types: Move stuff for global types into src/base/types.hh
--HG-- rename : src/sim/host.hh => src/base/types.hh
This commit is contained in:
parent
cbf237897f
commit
eef3a2e142
130 changed files with 141 additions and 141 deletions
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@ -38,7 +38,7 @@ namespace LittleEndianGuest {}
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#include "arch/alpha/max_inst_regs.hh"
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#include "arch/alpha/types.hh"
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#include "config/full_system.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class StaticInstPtr;
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@ -36,7 +36,7 @@
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#include "arch/alpha/ipr.hh"
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#include "arch/alpha/types.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "sim/serialize.hh"
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class Checkpoint;
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@ -34,7 +34,7 @@
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#include "arch/alpha/types.hh"
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#include "base/misc.hh"
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#include "config/full_system.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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@ -32,7 +32,7 @@
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#ifndef __ARCH_ALPHA_TYPES_HH__
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#define __ARCH_ALPHA_TYPES_HH__
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#include "sim/host.hh"
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#include "base/types.hh"
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namespace AlphaISA {
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@ -34,7 +34,7 @@
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#define __ARCH_ARM_ISA_TRAITS_HH__
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#include "arch/arm/types.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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namespace LittleEndianGuest {};
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@ -35,7 +35,7 @@
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#include "arch/arm/types.hh"
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#include "base/misc.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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@ -31,7 +31,7 @@
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#ifndef __ARCH_ARM_TYPES_HH__
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#define __ARCH_ARM_TYPES_HH__
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#include "sim/host.hh"
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#include "base/types.hh"
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namespace ArmISA
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{
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@ -37,7 +37,7 @@
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#include "base/misc.hh"
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#include "config/full_system.hh"
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#include "cpu/thread_context.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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@ -35,7 +35,7 @@
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#include "arch/mips/isa_traits.hh"
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#include "base/misc.hh"
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#include "config/full_system.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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@ -37,7 +37,7 @@
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#include "arch/mips/types.hh"
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#include "arch/mips/mips_core_specific.hh"
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#include "config/full_system.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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namespace LittleEndianGuest {};
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@ -34,7 +34,7 @@
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#include "arch/mips/types.hh"
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#include "base/misc.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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@ -31,7 +31,7 @@
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#ifndef __ARCH_MIPS_TYPES_HH__
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#define __ARCH_MIPS_TYPES_HH__
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#include "sim/host.hh"
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#include "base/types.hh"
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namespace MipsISA
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{
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@ -40,7 +40,7 @@
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#include "config/full_system.hh"
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//XXX This is needed for size_t. We should use something other than size_t
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//#include "kern/linux/linux.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "cpu/thread_context.hh"
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@ -36,7 +36,7 @@
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#include "arch/sparc/max_inst_regs.hh"
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#include "arch/sparc/sparc_traits.hh"
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#include "config/full_system.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class StaticInstPtr;
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@ -34,7 +34,7 @@
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#include "arch/sparc/types.hh"
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#include "base/misc.hh"
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#include "cpu/thread_context.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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@ -37,7 +37,7 @@
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#include "arch/sparc/isa_traits.hh"
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#include "arch/sparc/miscregfile.hh"
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#include "arch/sparc/types.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include <string>
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@ -58,7 +58,7 @@
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#ifndef __ARCH_X86_BIOS_ACPI_HH__
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#define __ARCH_X86_BIOS_ACPI_HH__
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "sim/sim_object.hh"
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#include <vector>
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@ -60,7 +60,7 @@
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#include "params/X86E820Entry.hh"
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#include "params/X86E820Table.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "sim/sim_object.hh"
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#include <vector>
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@ -60,7 +60,7 @@
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#include "base/misc.hh"
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#include "mem/port.hh"
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#include "sim/byteswap.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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// Config entry types
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#include "params/X86IntelMPBaseConfigEntry.hh"
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@ -92,7 +92,7 @@
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#include "params/X86SMBiosSMBiosStructure.hh"
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#include "params/X86SMBiosSMBiosTable.hh"
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#include "sim/byteswap.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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using namespace std;
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@ -93,7 +93,7 @@
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#include "enums/Characteristic.hh"
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#include "enums/ExtCharacteristic.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "sim/sim_object.hh"
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class FunctionalPort;
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@ -36,7 +36,7 @@
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "mem/request.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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namespace X86ISA
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{
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@ -62,7 +62,7 @@
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#include "arch/x86/max_inst_regs.hh"
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#include "arch/x86/types.hh"
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#include "arch/x86/x86_traits.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class StaticInstPtr;
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@ -91,7 +91,7 @@
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#include "arch/x86/faults.hh"
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#include "arch/x86/miscregs.hh"
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#include "arch/x86/types.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include <string>
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@ -61,7 +61,7 @@
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#include <iostream>
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#include <string>
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "base/bitunion.hh"
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#include "base/misc.hh"
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@ -65,7 +65,7 @@
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#include "mem/mem_object.hh"
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#include "mem/packet.hh"
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#include "params/X86PagetableWalker.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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@ -60,7 +60,7 @@
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#include "base/misc.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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namespace X86ISA
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{
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@ -65,7 +65,7 @@
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#include "base/bitfield.hh"
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#include "base/misc.hh"
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#include "base/trace.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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@ -63,7 +63,7 @@
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#include "arch/x86/isa_traits.hh"
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#include "arch/x86/miscregfile.hh"
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#include "arch/x86/types.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include <string>
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@ -63,7 +63,7 @@
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#include "base/misc.hh"
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#include "config/full_system.hh"
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#include "cpu/thread_context.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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#include "arch/x86/isa_traits.hh"
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#include "arch/x86/pagetable.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class ThreadContext;
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class FunctionalPort;
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#include <assert.h>
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#include "sim/host.hh"
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#include "base/types.hh"
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namespace X86ISA
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{
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@ -33,7 +33,7 @@
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#include "base/loader/symtab.hh"
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#include "config/cp_annotate.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "sim/serialize.hh"
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#include "sim/startup.hh"
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#include "sim/system.hh"
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@ -33,7 +33,7 @@
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#include <string>
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "base/crc.hh"
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#define ETHER_CRC_POLY_LE 0xedb88320
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#ifndef __BASE_CRC_HH__
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#define __BASE_CRC_HH__
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#include "sim/host.hh"
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#include "base/types.hh"
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uint32_t crc32be(const uint8_t *buf, size_t len);
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uint32_t crc32le(const uint8_t *buf, size_t len);
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@ -75,7 +75,7 @@ class FastAlloc
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#else
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#if FAST_ALLOC_DEBUG
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#include "sim/host.hh" // for Tick
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#include "base/types.hh"
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#endif
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class FastAlloc
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@ -39,7 +39,7 @@
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#include <string>
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#include "sim/host.hh"
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#include "base/types.hh"
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#if defined(__GNUC__) && __GNUC__ >= 3
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#define __hash_namespace __gnu_cxx
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#include <string>
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#include "base/misc.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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using namespace std;
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#include <string>
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#include "sim/host.hh"
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#include "base/types.hh"
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std::string &hostname();
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#include <string>
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#include "base/cprintf.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "base/inet.hh"
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using namespace std;
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#include "base/range.hh"
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#include "dev/etherpkt.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "dnet/os.h"
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#include "dnet/eth.h"
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#include <assert.h>
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#include "sim/host.hh"
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#include "base/types.hh"
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// Returns the prime number one less than n.
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int prevPrime(int n);
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#include <limits>
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#include <string>
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#include "sim/host.hh" // for Addr
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#include "base/types.hh"
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class Port;
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#include <limits>
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#include <string>
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#include "sim/host.hh" // for Addr
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#include "base/types.hh"
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class Port;
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class SymbolTable;
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#include "base/loader/symtab.hh"
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#include "base/misc.hh"
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#include "base/str.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "sim/serialize.hh"
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using namespace std;
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#include <map>
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#include <string>
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#include "sim/host.hh" // for Addr
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#include "base/types.hh"
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class Checkpoint;
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class SymbolTable
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#include "base/output.hh"
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#include "base/trace.hh"
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#include "base/varargs.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "sim/core.hh"
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using namespace std;
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#include <unistd.h>
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#include "sim/async.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "base/misc.hh"
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#include "base/pollevent.hh"
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#include "sim/core.hh"
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#include <string>
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#include "base/range.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class Checkpoint;
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#include <errno.h>
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#include <unistd.h>
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#include "sim/host.hh"
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#include "base/types.hh"
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#include "base/misc.hh"
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#include "base/socket.hh"
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#include "base/stats/info.hh"
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#include "base/stats/types.hh"
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#include "base/stats/visit.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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class Callback;
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#include "base/stats/events.hh"
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#include "base/stats/output.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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using namespace std;
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#include "base/stats/types.hh"
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#include "base/str.hh"
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#include "base/userinfo.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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using namespace std;
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#include <string>
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#include "base/mysql.hh"
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#include "sim/host.hh"
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#include "base/types.hh"
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namespace Stats {
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#include "base/statistics.hh"
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#include "base/stats/output.hh"
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#include "sim/eventq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
using namespace std;
|
||||
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
#include <limits>
|
||||
#include <vector>
|
||||
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
namespace Stats {
|
||||
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
#include <string>
|
||||
|
||||
#include "base/time.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
namespace Stats {
|
||||
|
||||
|
|
|
@ -38,7 +38,7 @@
|
|||
#include "base/cprintf.hh"
|
||||
#include "base/match.hh"
|
||||
#include "base/traceflags.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/core.hh"
|
||||
|
||||
namespace Trace {
|
||||
|
|
|
@ -30,12 +30,12 @@
|
|||
|
||||
/**
|
||||
* @file
|
||||
* Defines host-dependent types:
|
||||
* Defines global host-dependent types:
|
||||
* Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t.
|
||||
*/
|
||||
|
||||
#ifndef __HOST_HH__
|
||||
#define __HOST_HH__
|
||||
#ifndef __BASE_TYPES_HH__
|
||||
#define __BASE_TYPES_HH__
|
||||
|
||||
#include <inttypes.h>
|
||||
|
||||
|
@ -68,4 +68,4 @@ typedef uint64_t Addr;
|
|||
|
||||
const Addr MaxAddr = (Addr)-1;
|
||||
|
||||
#endif // __HOST_H__
|
||||
#endif // __BASE_TYPES_HH__
|
|
@ -34,7 +34,7 @@
|
|||
|
||||
#include "base/trace.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/insttracer.hh"
|
||||
#include "params/ExeTracer.hh"
|
||||
|
||||
|
|
|
@ -39,7 +39,7 @@
|
|||
#include "cpu/inorder/inorder_dyn_inst.hh"
|
||||
#include "cpu/inorder/pipeline_traits.hh"
|
||||
#include "cpu/inst_seq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
/** Struct that defines the information passed from in between stages */
|
||||
/** This information mainly goes forward through the pipeline. */
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
|
||||
#include "base/trace.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/insttracer.hh"
|
||||
#include "params/InOrderTrace.hh"
|
||||
#include "cpu/exetrace.hh"
|
||||
|
|
|
@ -35,7 +35,7 @@
|
|||
#include "base/trace.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
#include "params/IntelTrace.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/insttracer.hh"
|
||||
|
||||
class ThreadContext;
|
||||
|
|
|
@ -35,7 +35,7 @@
|
|||
#include "base/trace.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
#include "params/LegionTrace.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/insttracer.hh"
|
||||
|
||||
class ThreadContext;
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
|
||||
#include "base/trace.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/insttracer.hh"
|
||||
#include "arch/x86/intregs.hh"
|
||||
#include "arch/x86/floatregs.hh"
|
||||
|
|
|
@ -32,7 +32,7 @@
|
|||
#define __CPU_O3_2BIT_LOCAL_PRED_HH__
|
||||
|
||||
#include "cpu/o3/sat_counter.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
#include <vector>
|
||||
|
||||
|
|
|
@ -39,7 +39,7 @@
|
|||
#include "cpu/o3/ras.hh"
|
||||
#include "cpu/o3/tournament_pred.hh"
|
||||
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
#include <list>
|
||||
|
||||
|
|
|
@ -32,7 +32,7 @@
|
|||
#define __CPU_O3_BTB_HH__
|
||||
|
||||
#include "base/misc.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
class DefaultBTB
|
||||
{
|
||||
|
|
|
@ -35,7 +35,7 @@
|
|||
|
||||
#include "sim/faults.hh"
|
||||
#include "cpu/inst_seq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
// Typedef for physical register index type. Although the Impl would be the
|
||||
// most likely location for this, there are a few classes that need this
|
||||
|
|
|
@ -42,7 +42,7 @@
|
|||
#include "mem/packet.hh"
|
||||
#include "mem/request.hh"
|
||||
#include "sim/byteswap.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/core.hh"
|
||||
|
||||
#if FULL_SYSTEM
|
||||
|
|
|
@ -42,7 +42,7 @@
|
|||
#include "cpu/o3/dep_graph.hh"
|
||||
#include "cpu/op_class.hh"
|
||||
#include "sim/eventq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
class DerivO3CPUParams;
|
||||
class FUPool;
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#ifndef __CPU_O3_RAS_HH__
|
||||
#define __CPU_O3_RAS_HH__
|
||||
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include <vector>
|
||||
|
||||
/** Return address stack class, implements a simple RAS. */
|
||||
|
|
|
@ -32,7 +32,7 @@
|
|||
#define __CPU_O3_SAT_COUNTER_HH__
|
||||
|
||||
#include "base/misc.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
/**
|
||||
* Private counter class for the internal saturating counters.
|
||||
|
|
|
@ -37,7 +37,7 @@
|
|||
#include <vector>
|
||||
|
||||
#include "cpu/inst_seq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
struct ltseqnum {
|
||||
bool operator()(const InstSeqNum &lhs, const InstSeqNum &rhs) const
|
||||
|
|
|
@ -32,7 +32,7 @@
|
|||
#define __CPU_O3_TOURNAMENT_PRED_HH__
|
||||
|
||||
#include "cpu/o3/sat_counter.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include <vector>
|
||||
|
||||
/**
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
#include <utility>
|
||||
|
||||
#include "cpu/inst_seq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
/**
|
||||
* Simple class to hold onto a list of pairs, each pair having a memory
|
||||
|
|
|
@ -39,7 +39,7 @@
|
|||
#include "base/statistics.hh"
|
||||
#include "base/timebuf.hh"
|
||||
#include "cpu/inst_seq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
class FUPool;
|
||||
class MemInterface;
|
||||
|
|
|
@ -32,7 +32,7 @@
|
|||
#define __CPU_OZONE_NULL_PREDICTOR_HH__
|
||||
|
||||
#include "cpu/inst_seq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
template <class Impl>
|
||||
class NullPredictor
|
||||
|
|
|
@ -35,7 +35,7 @@
|
|||
#include <vector>
|
||||
|
||||
#include "base/misc.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
class ThreadContext;
|
||||
class PCEventQueue;
|
||||
|
|
|
@ -35,7 +35,7 @@
|
|||
|
||||
#include "arch/stacktrace.hh"
|
||||
#include "cpu/static_inst.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
class ThreadContext;
|
||||
|
||||
|
|
|
@ -51,7 +51,7 @@
|
|||
#include "mem/request.hh"
|
||||
#include "sim/byteswap.hh"
|
||||
#include "sim/debug.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/sim_events.hh"
|
||||
#include "sim/sim_object.hh"
|
||||
#include "sim/stats.hh"
|
||||
|
|
|
@ -41,7 +41,7 @@
|
|||
#include "mem/request.hh"
|
||||
#include "sim/byteswap.hh"
|
||||
#include "sim/eventq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/serialize.hh"
|
||||
|
||||
class BaseCPU;
|
||||
|
|
|
@ -43,7 +43,7 @@
|
|||
#include "base/refcnt.hh"
|
||||
#include "cpu/op_class.hh"
|
||||
#include "sim/faults.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
// forward declarations
|
||||
struct AlphaSimpleImpl;
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
#include "config/full_system.hh"
|
||||
#include "mem/request.hh"
|
||||
#include "sim/faults.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/serialize.hh"
|
||||
#include "sim/byteswap.hh"
|
||||
|
||||
|
|
|
@ -39,7 +39,7 @@
|
|||
#include "dev/alpha/access.h"
|
||||
#include "dev/io_device.hh"
|
||||
#include "params/AlphaBackdoor.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/sim_object.hh"
|
||||
|
||||
class BaseCPU;
|
||||
|
|
|
@ -40,7 +40,7 @@
|
|||
#include "dev/etherpkt.hh"
|
||||
#include "params/EtherLink.hh"
|
||||
#include "sim/eventq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/sim_object.hh"
|
||||
#include "params/EtherLink.hh"
|
||||
|
||||
|
|
|
@ -41,7 +41,7 @@
|
|||
#include <assert.h>
|
||||
|
||||
#include "base/refcnt.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
/*
|
||||
* Reference counted class containing ethernet packet data
|
||||
|
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#include "base/bitunion.hh"
|
||||
#include "sim/eventq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/serialize.hh"
|
||||
|
||||
/** Programmable Interval Timer (Intel 8254) */
|
||||
|
|
|
@ -39,7 +39,7 @@
|
|||
#include "dev/mips/access.h"
|
||||
#include "dev/io_device.hh"
|
||||
#include "params/MipsBackdoor.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/sim_object.hh"
|
||||
|
||||
class BaseCPU;
|
||||
|
|
|
@ -45,7 +45,7 @@
|
|||
#include "mem/packet.hh"
|
||||
#include "mem/packet_access.hh"
|
||||
#include "params/NSGigE.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/system.hh"
|
||||
|
||||
const char *NsRxStateStrings[] =
|
||||
|
|
|
@ -42,7 +42,7 @@
|
|||
#include "mem/packet.hh"
|
||||
#include "mem/packet_access.hh"
|
||||
#include "sim/eventq.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/stats.hh"
|
||||
|
||||
using namespace std;
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
#include "base/loader/symtab.hh"
|
||||
#include "cpu/thread_context.hh"
|
||||
#include "kern/tru64/mbuf.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/system.hh"
|
||||
#include "sim/arguments.hh"
|
||||
#include "arch/isa_traits.hh"
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
#ifndef __MBUF_HH__
|
||||
#define __MBUF_HH__
|
||||
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "arch/isa_traits.hh"
|
||||
|
||||
namespace tru64 {
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
#include "arch/vtophys.hh"
|
||||
#include "base/cprintf.hh"
|
||||
#include "base/trace.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/arguments.hh"
|
||||
|
||||
using namespace std;
|
||||
|
|
2
src/mem/cache/cache_impl.hh
vendored
2
src/mem/cache/cache_impl.hh
vendored
|
@ -37,7 +37,7 @@
|
|||
* Cache definitions.
|
||||
*/
|
||||
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "base/fast_alloc.hh"
|
||||
#include "base/misc.hh"
|
||||
#include "base/range.hh"
|
||||
|
|
2
src/mem/cache/mshr.cc
vendored
2
src/mem/cache/mshr.cc
vendored
|
@ -41,7 +41,7 @@
|
|||
|
||||
#include "mem/cache/mshr.hh"
|
||||
#include "sim/core.hh" // for curTick
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "base/misc.hh"
|
||||
#include "mem/cache/cache.hh"
|
||||
|
||||
|
|
2
src/mem/cache/tags/iic_repl/gen.cc
vendored
2
src/mem/cache/tags/iic_repl/gen.cc
vendored
|
@ -40,7 +40,7 @@
|
|||
#include "mem/cache/tags/iic.hh"
|
||||
#include "mem/cache/tags/iic_repl/gen.hh"
|
||||
#include "params/GenRepl.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
|
||||
using namespace std;
|
||||
|
||||
|
|
2
src/mem/cache/tags/iic_repl/repl.hh
vendored
2
src/mem/cache/tags/iic_repl/repl.hh
vendored
|
@ -42,7 +42,7 @@
|
|||
#include <list>
|
||||
|
||||
#include "cpu/smt.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/sim_object.hh"
|
||||
|
||||
|
||||
|
|
|
@ -49,7 +49,7 @@
|
|||
#include "base/misc.hh"
|
||||
#include "base/printable.hh"
|
||||
#include "mem/request.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/core.hh"
|
||||
|
||||
|
||||
|
|
|
@ -43,7 +43,7 @@
|
|||
#include "arch/tlb.hh"
|
||||
#include "base/hashmap.hh"
|
||||
#include "mem/request.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "base/types.hh"
|
||||
#include "sim/serialize.hh"
|
||||
|
||||
class Process;
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue