diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index f1c531c53..f9f7d6145 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -141,6 +141,7 @@ InOrderCPU::CPUEvent::process()
         break;
 
       case Trap:
+        DPRINTF(InOrderCPU, "Trapping CPU\n");
         cpu->trapCPU(fault, tid, inst);
         break;
 
diff --git a/src/cpu/inorder/resources/decode_unit.cc b/src/cpu/inorder/resources/decode_unit.cc
index 559becaaf..ccebddfaf 100644
--- a/src/cpu/inorder/resources/decode_unit.cc
+++ b/src/cpu/inorder/resources/decode_unit.cc
@@ -64,8 +64,8 @@ DecodeUnit::execute(int slot_num)
 
             if (inst->backSked != NULL) {
                 DPRINTF(InOrderDecode,
-                    "[tid:%i]: Setting Destination Register(s) for [sn:%i].\n",
-                    tid, inst->seqNum);
+                    "[tid:%i]: %s Setting Destination Register(s) for [sn:%i].\n",
+                        tid, inst->instName(), inst->seqNum);
                 regDepMap[tid]->insert(inst);
 
                 //inst->printSked();
diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc
index 6c9b6322f..2e52c5ac5 100644
--- a/src/cpu/inorder/resources/execution_unit.cc
+++ b/src/cpu/inorder/resources/execution_unit.cc
@@ -249,8 +249,9 @@ ExecutionUnit::execute(int slot_num)
 
                     exec_req->done();
                 } else {
-                    warn("inst [sn:%i] had a %s fault",
-                         seq_num, fault->name());
+                    warn("inst [sn:%i] had a %s fault", seq_num, fault->name());
+
+                    exec_req->done();
                 }
             } else {
                 // Regular ALU instruction
diff --git a/src/cpu/inorder/resources/graduation_unit.cc b/src/cpu/inorder/resources/graduation_unit.cc
index a7530345e..826ed8e03 100644
--- a/src/cpu/inorder/resources/graduation_unit.cc
+++ b/src/cpu/inorder/resources/graduation_unit.cc
@@ -68,13 +68,11 @@ GraduationUnit::execute(int slot_num)
             // Handle Any Faults Before Graduating Instruction
             if (inst->fault != NoFault) {
                 cpu->trap(inst->fault, tid, inst);
-                grad_req->setCompleted(false);
-                return;
             }
 
             DPRINTF(InOrderGraduation,
-                    "[tid:%i] Graduating instruction [sn:%i].\n",
-                    tid, inst->seqNum);
+                    "[tid:%i] Graduating instruction %s [sn:%i].\n",
+                    tid, inst->instName(), inst->seqNum);
 
             // Release Non-Speculative "Block" on instructions that could not
             // execute because there was a non-speculative inst. active.
diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc
index d05f42413..5bc78d6ba 100644
--- a/src/cpu/inorder/resources/use_def.cc
+++ b/src/cpu/inorder/resources/use_def.cc
@@ -148,11 +148,11 @@ UseDefUnit::execute(int slot_idx)
 
     // If there is a non-speculative instruction
     // in the pipeline then stall instructions here
-    if (*nonSpecInstActive[tid] == true &&
-        seq_num > *nonSpecSeqNum[tid]) {
+    if (*nonSpecInstActive[tid] == true && seq_num > *nonSpecSeqNum[tid]) {
         DPRINTF(InOrderUseDef, "[tid:%i]: [sn:%i] cannot execute because"
                 "there is non-speculative instruction [sn:%i] has not "
                 "graduated.\n", tid, seq_num, *nonSpecSeqNum[tid]);
+        ud_req->done(false);
         return;
     } else if (inst->isNonSpeculative()) {
         *nonSpecInstActive[tid] = true;