trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they have broader usage than simply tracing. This means that --trace-flags is now --debug-flags and --trace-help is now --debug-help
This commit is contained in:
parent
f946d7bcdb
commit
eddac53ff6
258
src/SConscript
258
src/SConscript
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@ -198,21 +198,23 @@ Export('UnitTest')
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########################################################################
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########################################################################
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#
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#
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# Trace Flags
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# Debug Flags
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#
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#
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trace_flags = {}
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debug_flags = {}
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def TraceFlag(name, desc=None):
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def DebugFlag(name, desc=None):
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if name in trace_flags:
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if name in debug_flags:
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raise AttributeError, "Flag %s already specified" % name
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raise AttributeError, "Flag %s already specified" % name
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trace_flags[name] = (name, (), desc)
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debug_flags[name] = (name, (), desc)
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TraceFlag = DebugFlag
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def CompoundFlag(name, flags, desc=None):
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def CompoundFlag(name, flags, desc=None):
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if name in trace_flags:
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if name in debug_flags:
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raise AttributeError, "Flag %s already specified" % name
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raise AttributeError, "Flag %s already specified" % name
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compound = tuple(flags)
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compound = tuple(flags)
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trace_flags[name] = (name, compound, desc)
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debug_flags[name] = (name, compound, desc)
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Export('DebugFlag')
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Export('TraceFlag')
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Export('TraceFlag')
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Export('CompoundFlag')
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Export('CompoundFlag')
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@ -622,81 +624,16 @@ for swig in SwigSource.all:
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MakeAction(makeEmbeddedSwigInit, Transform("EMBED SW")))
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MakeAction(makeEmbeddedSwigInit, Transform("EMBED SW")))
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Source(init_file)
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Source(init_file)
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def getFlags(source_flags):
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#
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flagsMap = {}
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# Handle debug flags
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flagsList = []
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#
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for s in source_flags:
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def makeDebugFlagCC(target, source, env):
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val = eval(s.get_contents())
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assert(len(target) == 1 and len(source) == 1)
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name, compound, desc = val
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flagsList.append(val)
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flagsMap[name] = bool(compound)
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for name, compound, desc in flagsList:
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val = eval(source[0].get_contents())
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for flag in compound:
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name, compound, desc = val
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if flag not in flagsMap:
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compound = list(sorted(compound))
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raise AttributeError, "Trace flag %s not found" % flag
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if flagsMap[flag]:
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raise AttributeError, \
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"Compound flag can't point to another compound flag"
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flagsList.sort()
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return flagsList
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# Generate traceflags.py
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def traceFlagsPy(target, source, env):
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assert(len(target) == 1)
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code = code_formatter()
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allFlags = getFlags(source)
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code('basic = [')
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code.indent()
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for flag, compound, desc in allFlags:
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if not compound:
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code("'$flag',")
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code(']')
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code.dedent()
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code()
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code('compound = [')
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code.indent()
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code("'All',")
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for flag, compound, desc in allFlags:
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if compound:
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code("'$flag',")
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code("]")
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code.dedent()
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code()
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code("all = frozenset(basic + compound)")
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code()
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code('compoundMap = {')
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code.indent()
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all = tuple([flag for flag,compound,desc in allFlags if not compound])
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code("'All' : $all,")
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for flag, compound, desc in allFlags:
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if compound:
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code("'$flag' : $compound,")
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code('}')
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code.dedent()
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code()
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code('descriptions = {')
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code.indent()
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code("'All' : 'All flags',")
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for flag, compound, desc in allFlags:
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code("'$flag' : '$desc',")
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code("}")
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code.dedent()
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code.write(str(target[0]))
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def traceFlagsCC(target, source, env):
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assert(len(target) == 1)
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allFlags = getFlags(source)
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code = code_formatter()
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code = code_formatter()
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# file header
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# file header
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@ -705,75 +642,39 @@ def traceFlagsCC(target, source, env):
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* DO NOT EDIT THIS FILE! Automatically generated
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* DO NOT EDIT THIS FILE! Automatically generated
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*/
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*/
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#include "base/traceflags.hh"
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#include "base/debug.hh"
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using namespace Trace;
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const char *Trace::flagStrings[] =
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{''')
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code.indent()
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# The string array is used by SimpleEnumParam to map the strings
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# provided by the user to enum values.
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for flag, compound, desc in allFlags:
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if not compound:
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code('"$flag",')
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code('"All",')
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for flag, compound, desc in allFlags:
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if compound:
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code('"$flag",')
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code.dedent()
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code('''\
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};
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const int Trace::numFlagStrings = ${{len(allFlags) + 1}};
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''')
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''')
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# Now define the individual compound flag arrays. There is an array
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for flag in compound:
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# for each compound flag listing the component base flags.
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code('#include "debug/$flag.hh"')
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all = tuple([flag for flag,compound,desc in allFlags if not compound])
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code()
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code('static const Flags AllMap[] = {')
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code('namespace Debug {')
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code.indent()
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for flag, compound, desc in allFlags:
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if not compound:
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code('$flag,')
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code.dedent()
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code('};')
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code()
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code()
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for flag, compound, desc in allFlags:
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if not compound:
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if not compound:
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code('SimpleFlag $name("$name", "$desc");')
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continue
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else:
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code('static const Flags ${flag}Map[] = {')
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code('CompoundFlag $name("$name", "$desc",')
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code.indent()
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code.indent()
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for flag in compound:
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last = len(compound) - 1
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code('$flag,')
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for i,flag in enumerate(compound):
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code('(Flags)-1')
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if i != last:
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code('$flag,')
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else:
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code('$flag);')
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code.dedent()
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code.dedent()
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code('};')
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code()
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# Finally the compoundFlags[] array maps the compound flags
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code()
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# to their individual arrays/
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code('} // namespace Debug')
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code('const Flags *Trace::compoundFlags[] = {')
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code.indent()
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code('AllMap,')
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for flag, compound, desc in allFlags:
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if compound:
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code('${flag}Map,')
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# file trailer
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code.dedent()
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code('};')
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code.write(str(target[0]))
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code.write(str(target[0]))
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def traceFlagsHH(target, source, env):
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def makeDebugFlagHH(target, source, env):
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assert(len(target) == 1)
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assert(len(target) == 1 and len(source) == 1)
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val = eval(source[0].get_contents())
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name, compound, desc = val
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allFlags = getFlags(source)
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code = code_formatter()
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code = code_formatter()
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# file header boilerplate
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# file header boilerplate
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@ -781,76 +682,43 @@ def traceFlagsHH(target, source, env):
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/*
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/*
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* DO NOT EDIT THIS FILE!
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* DO NOT EDIT THIS FILE!
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*
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*
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* Automatically generated from traceflags.py
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* Automatically generated by SCons
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*/
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*/
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#ifndef __BASE_TRACE_FLAGS_HH__
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#ifndef __DEBUG_${name}_HH__
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#define __BASE_TRACE_FLAGS_HH__
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#define __DEBUG_${name}_HH__
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namespace Trace {
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namespace Debug {
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''')
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enum Flags {''')
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if compound:
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code('class CompoundFlag;')
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code('class SimpleFlag;')
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# Generate the enum. Base flags come first, then compound flags.
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if compound:
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idx = 0
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code('extern CompoundFlag $name;')
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code.indent()
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for flag in compound:
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for flag, compound, desc in allFlags:
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code('extern SimpleFlag $flag;')
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if not compound:
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else:
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code('$flag = $idx,')
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code('extern SimpleFlag $name;')
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idx += 1
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numBaseFlags = idx
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code('NumFlags = $idx,')
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code.dedent()
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code()
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# put a comment in here to separate base from compound flags
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code('''
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code('''
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// The remaining enum values are *not* valid indices for Trace::flags.
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}
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// They are "compound" flags, which correspond to sets of base
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// flags, and are used by changeFlag.''')
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code.indent()
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#endif // __DEBUG_${name}_HH__
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code('All = $idx,')
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idx += 1
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for flag, compound, desc in allFlags:
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if compound:
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code('$flag = $idx,')
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idx += 1
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numCompoundFlags = idx - numBaseFlags
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code('NumCompoundFlags = $numCompoundFlags')
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code.dedent()
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# trailer boilerplate
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code('''\
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}; // enum Flags
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// Array of strings for SimpleEnumParam
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extern const char *flagStrings[];
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extern const int numFlagStrings;
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// Array of arraay pointers: for each compound flag, gives the list of
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// base flags to set. Inidividual flag arrays are terminated by -1.
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extern const Flags *compoundFlags[];
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} // namespace Trace
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#endif // __BASE_TRACE_FLAGS_HH__
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''')
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''')
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code.write(str(target[0]))
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code.write(str(target[0]))
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flags = map(Value, trace_flags.values())
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for name,flag in sorted(debug_flags.iteritems()):
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env.Command('base/traceflags.py', flags,
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n, compound, desc = flag
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MakeAction(traceFlagsPy, Transform("TRACING", 0)))
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assert n == name
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PySource('m5', 'base/traceflags.py')
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env.Command('base/traceflags.hh', flags,
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env.Command('debug/%s.hh' % name, Value(flag),
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MakeAction(traceFlagsHH, Transform("TRACING", 0)))
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MakeAction(makeDebugFlagHH, Transform("TRACING", 0)))
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env.Command('base/traceflags.cc', flags,
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env.Command('debug/%s.cc' % name, Value(flag),
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MakeAction(traceFlagsCC, Transform("TRACING", 0)))
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MakeAction(makeDebugFlagCC, Transform("TRACING", 0)))
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Source('base/traceflags.cc')
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Source('debug/%s.cc' % name)
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# Embed python files. All .py files that have been indicated by a
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# Embed python files. All .py files that have been indicated by a
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# PySource() call in a SConscript need to be embedded into the M5
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# PySource() call in a SConscript need to be embedded into the M5
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@ -37,6 +37,8 @@
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#include "base/compiler.hh"
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#include "base/compiler.hh"
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "debug/Flow.hh"
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#include "debug/Interrupt.hh"
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#include "params/AlphaInterrupts.hh"
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#include "params/AlphaInterrupts.hh"
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#include "sim/sim_object.hh"
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#include "sim/sim_object.hh"
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@ -38,6 +38,7 @@
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#include "arch/alpha/osfpal.hh"
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#include "arch/alpha/osfpal.hh"
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "debug/Context.hh"
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#include "kern/tru64/tru64_syscalls.hh"
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#include "kern/tru64/tru64_syscalls.hh"
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#include "sim/system.hh"
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#include "sim/system.hh"
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@ -34,6 +34,7 @@
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#include "arch/alpha/isa_traits.hh"
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#include "arch/alpha/isa_traits.hh"
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "debug/SyscallVerbose.hh"
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#include "kern/linux/linux.hh"
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#include "kern/linux/linux.hh"
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#include "sim/process.hh"
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#include "sim/process.hh"
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#include "sim/syscall_emul.hh"
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#include "sim/syscall_emul.hh"
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@ -48,6 +48,7 @@
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#include "base/loader/symtab.hh"
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#include "base/loader/symtab.hh"
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#include "cpu/base.hh"
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#include "cpu/base.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "debug/Thread.hh"
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#include "dev/platform.hh"
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#include "dev/platform.hh"
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#include "kern/linux/events.hh"
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#include "kern/linux/events.hh"
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#include "kern/linux/printk.hh"
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#include "kern/linux/printk.hh"
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#include "base/loader/object_file.hh"
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#include "base/loader/object_file.hh"
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#include "base/misc.hh"
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#include "base/misc.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "debug/Loader.hh"
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#include "mem/page_table.hh"
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#include "mem/page_table.hh"
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#include "sim/byteswap.hh"
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#include "sim/byteswap.hh"
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#include "sim/process_impl.hh"
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#include "sim/process_impl.hh"
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@ -136,6 +136,8 @@
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "cpu/static_inst.hh"
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#include "cpu/static_inst.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "debug/GDBAcc.hh"
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#include "debug/GDBMisc.hh"
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#include "mem/physical.hh"
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#include "mem/physical.hh"
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#include "mem/port.hh"
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#include "mem/port.hh"
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#include "sim/system.hh"
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#include "sim/system.hh"
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@ -33,6 +33,7 @@
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "cpu/static_inst.hh"
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#include "cpu/static_inst.hh"
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#include "debug/Stack.hh"
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class ThreadContext;
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class ThreadContext;
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@ -37,6 +37,7 @@
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#include "base/loader/object_file.hh"
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#include "base/loader/object_file.hh"
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#include "base/loader/symtab.hh"
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#include "base/loader/symtab.hh"
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "debug/Loader.hh"
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#include "mem/physical.hh"
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#include "mem/physical.hh"
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#include "mem/vport.hh"
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#include "mem/vport.hh"
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#include "params/AlphaSystem.hh"
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#include "params/AlphaSystem.hh"
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@ -40,6 +40,7 @@
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#include "base/str.hh"
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#include "base/str.hh"
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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#include "debug/TLB.hh"
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using namespace std;
|
using namespace std;
|
||||||
|
|
||||||
|
|
|
@ -37,6 +37,7 @@
|
||||||
#include "base/chunk_generator.hh"
|
#include "base/chunk_generator.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/VtoPhys.hh"
|
||||||
#include "mem/vport.hh"
|
#include "mem/vport.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -46,6 +46,7 @@
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Faults.hh"
|
||||||
|
|
||||||
namespace ArmISA
|
namespace ArmISA
|
||||||
{
|
{
|
||||||
|
|
|
@ -39,6 +39,8 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "arch/arm/isa.hh"
|
#include "arch/arm/isa.hh"
|
||||||
|
#include "debug/Arm.hh"
|
||||||
|
#include "debug/MiscRegs.hh"
|
||||||
#include "sim/faults.hh"
|
#include "sim/faults.hh"
|
||||||
#include "sim/stat_control.hh"
|
#include "sim/stat_control.hh"
|
||||||
|
|
||||||
|
|
|
@ -46,6 +46,7 @@
|
||||||
#include "arch/arm/registers.hh"
|
#include "arch/arm/registers.hh"
|
||||||
#include "arch/arm/tlb.hh"
|
#include "arch/arm/tlb.hh"
|
||||||
#include "arch/arm/types.hh"
|
#include "arch/arm/types.hh"
|
||||||
|
#include "debug/Checkpoint.hh"
|
||||||
|
|
||||||
class ThreadContext;
|
class ThreadContext;
|
||||||
class Checkpoint;
|
class Checkpoint;
|
||||||
|
|
|
@ -87,6 +87,7 @@ output exec {{
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#include "base/cp_annotate.hh"
|
#include "base/cp_annotate.hh"
|
||||||
|
#include "debug/Arm.hh"
|
||||||
#include "mem/packet.hh"
|
#include "mem/packet.hh"
|
||||||
#include "mem/packet_access.hh"
|
#include "mem/packet_access.hh"
|
||||||
#include "sim/sim_exit.hh"
|
#include "sim/sim_exit.hh"
|
||||||
|
|
|
@ -44,6 +44,7 @@
|
||||||
#include "arch/arm/miscregs.hh"
|
#include "arch/arm/miscregs.hh"
|
||||||
#include "arch/arm/nativetrace.hh"
|
#include "arch/arm/nativetrace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/ExecRegDelta.hh"
|
||||||
#include "params/ArmNativeTrace.hh"
|
#include "params/ArmNativeTrace.hh"
|
||||||
#include "sim/byteswap.hh"
|
#include "sim/byteswap.hh"
|
||||||
|
|
||||||
|
|
|
@ -46,6 +46,7 @@
|
||||||
#include "arch/arm/utility.hh"
|
#include "arch/arm/utility.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Predecoder.hh"
|
||||||
|
|
||||||
namespace ArmISA
|
namespace ArmISA
|
||||||
{
|
{
|
||||||
|
|
|
@ -48,6 +48,7 @@
|
||||||
#include "base/loader/object_file.hh"
|
#include "base/loader/object_file.hh"
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Stack.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "mem/translating_port.hh"
|
#include "mem/translating_port.hh"
|
||||||
#include "sim/byteswap.hh"
|
#include "sim/byteswap.hh"
|
||||||
|
|
|
@ -151,6 +151,8 @@
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
#include "cpu/thread_state.hh"
|
#include "cpu/thread_state.hh"
|
||||||
|
#include "debug/GDBAcc.hh"
|
||||||
|
#include "debug/GDBMisc.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "mem/physical.hh"
|
#include "mem/physical.hh"
|
||||||
#include "mem/port.hh"
|
#include "mem/port.hh"
|
||||||
|
|
|
@ -33,6 +33,7 @@
|
||||||
|
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
|
#include "debug/Stack.hh"
|
||||||
|
|
||||||
class ThreadContext;
|
class ThreadContext;
|
||||||
namespace ArmISA
|
namespace ArmISA
|
||||||
|
|
|
@ -53,6 +53,9 @@
|
||||||
#include "base/str.hh"
|
#include "base/str.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Checkpoint.hh"
|
||||||
|
#include "debug/TLB.hh"
|
||||||
|
#include "debug/TLBVerbose.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "params/ArmTLB.hh"
|
#include "params/ArmTLB.hh"
|
||||||
#include "sim/process.hh"
|
#include "sim/process.hh"
|
||||||
|
|
|
@ -48,6 +48,7 @@
|
||||||
#include "base/hashmap.hh"
|
#include "base/hashmap.hh"
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "base/types.hh"
|
#include "base/types.hh"
|
||||||
|
#include "debug/Predecoder.hh"
|
||||||
|
|
||||||
namespace ArmISA
|
namespace ArmISA
|
||||||
{
|
{
|
||||||
|
|
|
@ -36,6 +36,7 @@
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/MipsPRA.hh"
|
||||||
|
|
||||||
#if !FULL_SYSTEM
|
#if !FULL_SYSTEM
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
|
|
|
@ -35,6 +35,7 @@
|
||||||
#include "base/bitfield.hh"
|
#include "base/bitfield.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/MipsPRA.hh"
|
||||||
|
|
||||||
namespace MipsISA
|
namespace MipsISA
|
||||||
{
|
{
|
||||||
|
|
|
@ -82,6 +82,7 @@ output exec {{
|
||||||
|
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
|
#include "debug/MipsPRA.hh"
|
||||||
#include "mem/packet.hh"
|
#include "mem/packet.hh"
|
||||||
#include "mem/packet_access.hh"
|
#include "mem/packet_access.hh"
|
||||||
#include "sim/eventq.hh"
|
#include "sim/eventq.hh"
|
||||||
|
|
|
@ -35,6 +35,7 @@
|
||||||
#include "arch/mips/isa_traits.hh"
|
#include "arch/mips/isa_traits.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/SyscallVerbose.hh"
|
||||||
#include "kern/linux/linux.hh"
|
#include "kern/linux/linux.hh"
|
||||||
#include "sim/eventq.hh"
|
#include "sim/eventq.hh"
|
||||||
#include "sim/process.hh"
|
#include "sim/process.hh"
|
||||||
|
|
|
@ -40,6 +40,7 @@
|
||||||
#include "arch/registers.hh"
|
#include "arch/registers.hh"
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
|
#include "debug/LLSC.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
|
|
||||||
namespace MipsISA
|
namespace MipsISA
|
||||||
|
|
|
@ -36,6 +36,7 @@
|
||||||
#include "base/loader/object_file.hh"
|
#include "base/loader/object_file.hh"
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Loader.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "sim/process.hh"
|
#include "sim/process.hh"
|
||||||
#include "sim/process_impl.hh"
|
#include "sim/process_impl.hh"
|
||||||
|
|
|
@ -33,6 +33,7 @@
|
||||||
|
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
|
#include "debug/Stack.hh"
|
||||||
|
|
||||||
class ThreadContext;
|
class ThreadContext;
|
||||||
|
|
||||||
|
|
|
@ -43,6 +43,8 @@
|
||||||
#include "base/str.hh"
|
#include "base/str.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/MipsPRA.hh"
|
||||||
|
#include "debug/TLB.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "params/MipsTLB.hh"
|
#include "params/MipsTLB.hh"
|
||||||
#include "sim/process.hh"
|
#include "sim/process.hh"
|
||||||
|
|
|
@ -37,6 +37,7 @@
|
||||||
#include "base/loader/object_file.hh"
|
#include "base/loader/object_file.hh"
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Stack.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "mem/translating_port.hh"
|
#include "mem/translating_port.hh"
|
||||||
#include "sim/process_impl.hh"
|
#include "sim/process_impl.hh"
|
||||||
|
|
|
@ -37,6 +37,7 @@
|
||||||
|
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
|
#include "debug/Stack.hh"
|
||||||
|
|
||||||
class ThreadContext;
|
class ThreadContext;
|
||||||
class StackTrace;
|
class StackTrace;
|
||||||
|
|
|
@ -46,6 +46,8 @@
|
||||||
#include "base/str.hh"
|
#include "base/str.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Power.hh"
|
||||||
|
#include "debug/TLB.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "params/PowerTLB.hh"
|
#include "params/PowerTLB.hh"
|
||||||
#include "sim/process.hh"
|
#include "sim/process.hh"
|
||||||
|
|
|
@ -36,6 +36,7 @@
|
||||||
#include "arch/sparc/isa_traits.hh"
|
#include "arch/sparc/isa_traits.hh"
|
||||||
#include "arch/sparc/registers.hh"
|
#include "arch/sparc/registers.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Interrupt.hh"
|
||||||
#include "params/SparcInterrupts.hh"
|
#include "params/SparcInterrupts.hh"
|
||||||
#include "sim/sim_object.hh"
|
#include "sim/sim_object.hh"
|
||||||
|
|
||||||
|
|
|
@ -35,6 +35,8 @@
|
||||||
#include "config/full_system.hh"
|
#include "config/full_system.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/MiscRegs.hh"
|
||||||
|
#include "debug/Timer.hh"
|
||||||
|
|
||||||
namespace SparcISA
|
namespace SparcISA
|
||||||
{
|
{
|
||||||
|
|
|
@ -74,6 +74,7 @@ output exec {{
|
||||||
#include "base/bigint.hh"
|
#include "base/bigint.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
|
#include "debug/Sparc.hh"
|
||||||
#include "mem/packet.hh"
|
#include "mem/packet.hh"
|
||||||
#include "mem/packet_access.hh"
|
#include "mem/packet_access.hh"
|
||||||
#include "sim/sim_exit.hh"
|
#include "sim/sim_exit.hh"
|
||||||
|
|
|
@ -39,6 +39,7 @@
|
||||||
#include "base/loader/object_file.hh"
|
#include "base/loader/object_file.hh"
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Stack.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "mem/translating_port.hh"
|
#include "mem/translating_port.hh"
|
||||||
#include "sim/process_impl.hh"
|
#include "sim/process_impl.hh"
|
||||||
|
|
|
@ -130,6 +130,7 @@
|
||||||
#include "config/full_system.hh"
|
#include "config/full_system.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/GDBRead.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "mem/physical.hh"
|
#include "mem/physical.hh"
|
||||||
#include "mem/port.hh"
|
#include "mem/port.hh"
|
||||||
|
|
|
@ -35,6 +35,7 @@
|
||||||
|
|
||||||
#include "base/types.hh"
|
#include "base/types.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
|
#include "debug/Stack.hh"
|
||||||
|
|
||||||
class ThreadContext;
|
class ThreadContext;
|
||||||
namespace SparcISA
|
namespace SparcISA
|
||||||
|
|
|
@ -38,6 +38,8 @@
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/IPR.hh"
|
||||||
|
#include "debug/TLB.hh"
|
||||||
#include "mem/packet_access.hh"
|
#include "mem/packet_access.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
#include "sim/system.hh"
|
#include "sim/system.hh"
|
||||||
|
|
|
@ -33,6 +33,8 @@
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Quiesce.hh"
|
||||||
|
#include "debug/Timer.hh"
|
||||||
#include "sim/system.hh"
|
#include "sim/system.hh"
|
||||||
|
|
||||||
using namespace SparcISA;
|
using namespace SparcISA;
|
||||||
|
|
|
@ -36,6 +36,7 @@
|
||||||
#include "base/compiler.hh"
|
#include "base/compiler.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/VtoPhys.hh"
|
||||||
#include "mem/vport.hh"
|
#include "mem/vport.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -45,12 +45,14 @@
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "config/full_system.hh"
|
#include "config/full_system.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
|
||||||
#if !FULL_SYSTEM
|
#if !FULL_SYSTEM
|
||||||
#include "arch/x86/isa_traits.hh"
|
#include "arch/x86/isa_traits.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "sim/process.hh"
|
#include "sim/process.hh"
|
||||||
#else
|
#else
|
||||||
#include "arch/x86/tlb.hh"
|
#include "arch/x86/tlb.hh"
|
||||||
|
#include "debug/Faults.hh"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
namespace X86ISA
|
namespace X86ISA
|
||||||
|
|
|
@ -42,6 +42,7 @@
|
||||||
#include "arch/x86/insts/microregop.hh"
|
#include "arch/x86/insts/microregop.hh"
|
||||||
#include "arch/x86/regs/misc.hh"
|
#include "arch/x86/regs/misc.hh"
|
||||||
#include "base/condcodes.hh"
|
#include "base/condcodes.hh"
|
||||||
|
#include "debug/X86.hh"
|
||||||
|
|
||||||
namespace X86ISA
|
namespace X86ISA
|
||||||
{
|
{
|
||||||
|
|
|
@ -42,6 +42,7 @@
|
||||||
|
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
|
#include "debug/X86.hh"
|
||||||
|
|
||||||
namespace X86ISA
|
namespace X86ISA
|
||||||
{
|
{
|
||||||
|
|
|
@ -41,6 +41,7 @@
|
||||||
#include "arch/x86/interrupts.hh"
|
#include "arch/x86/interrupts.hh"
|
||||||
#include "arch/x86/intmessage.hh"
|
#include "arch/x86/intmessage.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
|
#include "debug/LocalApic.hh"
|
||||||
#include "dev/x86/i82094aa.hh"
|
#include "dev/x86/i82094aa.hh"
|
||||||
#include "dev/x86/pc.hh"
|
#include "dev/x86/pc.hh"
|
||||||
#include "dev/x86/south_bridge.hh"
|
#include "dev/x86/south_bridge.hh"
|
||||||
|
|
|
@ -118,6 +118,7 @@ output exec {{
|
||||||
#include "base/condcodes.hh"
|
#include "base/condcodes.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
|
#include "debug/X86.hh"
|
||||||
#include "mem/packet.hh"
|
#include "mem/packet.hh"
|
||||||
#include "mem/packet_access.hh"
|
#include "mem/packet_access.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
|
|
|
@ -33,6 +33,7 @@
|
||||||
#include "arch/x86/isa_traits.hh"
|
#include "arch/x86/isa_traits.hh"
|
||||||
#include "arch/x86/nativetrace.hh"
|
#include "arch/x86/nativetrace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/ExecRegDelta.hh"
|
||||||
#include "params/X86NativeTrace.hh"
|
#include "params/X86NativeTrace.hh"
|
||||||
#include "sim/byteswap.hh"
|
#include "sim/byteswap.hh"
|
||||||
|
|
||||||
|
|
|
@ -44,6 +44,7 @@
|
||||||
#include "base/bitfield.hh"
|
#include "base/bitfield.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/PageTableWalker.hh"
|
||||||
#include "mem/packet_access.hh"
|
#include "mem/packet_access.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
#include "sim/system.hh"
|
#include "sim/system.hh"
|
||||||
|
|
|
@ -43,6 +43,7 @@
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "base/types.hh"
|
#include "base/types.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Predecoder.hh"
|
||||||
|
|
||||||
namespace X86ISA
|
namespace X86ISA
|
||||||
{
|
{
|
||||||
|
|
|
@ -48,6 +48,7 @@
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "base/types.hh"
|
#include "base/types.hh"
|
||||||
|
#include "debug/Predecoder.hh"
|
||||||
|
|
||||||
class ThreadContext;
|
class ThreadContext;
|
||||||
|
|
||||||
|
|
|
@ -51,6 +51,7 @@
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Stack.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "mem/translating_port.hh"
|
#include "mem/translating_port.hh"
|
||||||
#include "sim/process_impl.hh"
|
#include "sim/process_impl.hh"
|
||||||
|
|
|
@ -33,6 +33,7 @@
|
||||||
|
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
|
#include "debug/Stack.hh"
|
||||||
|
|
||||||
class ThreadContext;
|
class ThreadContext;
|
||||||
namespace X86ISA
|
namespace X86ISA
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
#include "config/full_system.hh"
|
#include "config/full_system.hh"
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/TLB.hh"
|
||||||
#include "mem/packet_access.hh"
|
#include "mem/packet_access.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
|
|
||||||
|
|
|
@ -45,6 +45,7 @@
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "config/full_system.hh"
|
#include "config/full_system.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/VtoPhys.hh"
|
||||||
#include "sim/fault_fwd.hh"
|
#include "sim/fault_fwd.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -31,12 +31,24 @@
|
||||||
#include <sys/types.h>
|
#include <sys/types.h>
|
||||||
#include <unistd.h>
|
#include <unistd.h>
|
||||||
|
|
||||||
|
#include <algorithm>
|
||||||
#include <csignal>
|
#include <csignal>
|
||||||
|
#include <map>
|
||||||
|
#include <vector>
|
||||||
|
|
||||||
#include "base/cprintf.hh"
|
#include "base/cprintf.hh"
|
||||||
|
#include "base/debug.hh"
|
||||||
|
#include "base/misc.hh"
|
||||||
|
|
||||||
|
using namespace std;
|
||||||
|
|
||||||
namespace Debug {
|
namespace Debug {
|
||||||
|
|
||||||
|
//
|
||||||
|
// This function will cause the process to signal itself with a
|
||||||
|
// SIGTRAP which is ignored if not in gdb, but will cause the debugger
|
||||||
|
// to break if in gdb.
|
||||||
|
//
|
||||||
void
|
void
|
||||||
breakpoint()
|
breakpoint()
|
||||||
{
|
{
|
||||||
|
@ -47,4 +59,127 @@ breakpoint()
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Flags for debugging purposes. Primarily for trace.hh
|
||||||
|
//
|
||||||
|
typedef std::map<string, Flag *> FlagsMap;
|
||||||
|
int allFlagsVersion = 0;
|
||||||
|
FlagsMap &
|
||||||
|
allFlags()
|
||||||
|
{
|
||||||
|
static FlagsMap flags;
|
||||||
|
return flags;
|
||||||
|
}
|
||||||
|
|
||||||
|
Flag *
|
||||||
|
findFlag(const std::string &name)
|
||||||
|
{
|
||||||
|
FlagsMap::iterator i = allFlags().find(name);
|
||||||
|
if (i == allFlags().end())
|
||||||
|
return NULL;
|
||||||
|
return i->second;
|
||||||
|
}
|
||||||
|
|
||||||
|
Flag::Flag(const char *name, const char *desc)
|
||||||
|
: _name(name), _desc(desc)
|
||||||
|
{
|
||||||
|
pair<FlagsMap::iterator, bool> result =
|
||||||
|
allFlags().insert(make_pair(name, this));
|
||||||
|
|
||||||
|
if (!result.second)
|
||||||
|
panic("Flag %s already defined!", name);
|
||||||
|
|
||||||
|
++allFlagsVersion;
|
||||||
|
}
|
||||||
|
|
||||||
|
Flag::~Flag()
|
||||||
|
{
|
||||||
|
// should find and remove flag.
|
||||||
|
}
|
||||||
|
|
||||||
|
void
|
||||||
|
CompoundFlag::enable()
|
||||||
|
{
|
||||||
|
SimpleFlag::enable();
|
||||||
|
for_each(flags.begin(), flags.end(), mem_fun(&Flag::enable));
|
||||||
|
}
|
||||||
|
|
||||||
|
void
|
||||||
|
CompoundFlag::disable()
|
||||||
|
{
|
||||||
|
SimpleFlag::disable();
|
||||||
|
for_each(flags.begin(), flags.end(), mem_fun(&Flag::disable));
|
||||||
|
}
|
||||||
|
|
||||||
|
struct AllFlags : public Flag
|
||||||
|
{
|
||||||
|
AllFlags()
|
||||||
|
: Flag("All", "All Flags")
|
||||||
|
{}
|
||||||
|
|
||||||
|
void
|
||||||
|
enable()
|
||||||
|
{
|
||||||
|
FlagsMap::iterator i = allFlags().begin();
|
||||||
|
FlagsMap::iterator end = allFlags().end();
|
||||||
|
for (; i != end; ++i)
|
||||||
|
if (i->second != this)
|
||||||
|
i->second->enable();
|
||||||
|
}
|
||||||
|
|
||||||
|
void
|
||||||
|
disable()
|
||||||
|
{
|
||||||
|
FlagsMap::iterator i = allFlags().begin();
|
||||||
|
FlagsMap::iterator end = allFlags().end();
|
||||||
|
for (; i != end; ++i)
|
||||||
|
if (i->second != this)
|
||||||
|
i->second->enable();
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
|
AllFlags theAllFlags;
|
||||||
|
Flag *const All = &theAllFlags;
|
||||||
|
|
||||||
|
bool
|
||||||
|
changeFlag(const char *s, bool value)
|
||||||
|
{
|
||||||
|
Flag *f = findFlag(s);
|
||||||
|
if (!f)
|
||||||
|
return false;
|
||||||
|
|
||||||
|
if (value)
|
||||||
|
f->enable();
|
||||||
|
else
|
||||||
|
f->disable();
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
} // namespace Debug
|
} // namespace Debug
|
||||||
|
|
||||||
|
// add a set of functions that can easily be invoked from gdb
|
||||||
|
void
|
||||||
|
setDebugFlag(const char *string)
|
||||||
|
{
|
||||||
|
Debug::changeFlag(string, true);
|
||||||
|
}
|
||||||
|
|
||||||
|
void
|
||||||
|
clearDebugFlag(const char *string)
|
||||||
|
{
|
||||||
|
Debug::changeFlag(string, false);
|
||||||
|
}
|
||||||
|
|
||||||
|
void
|
||||||
|
dumpDebugFlags()
|
||||||
|
{
|
||||||
|
using namespace Debug;
|
||||||
|
FlagsMap::iterator i = allFlags().begin();
|
||||||
|
FlagsMap::iterator end = allFlags().end();
|
||||||
|
for (; i != end; ++i) {
|
||||||
|
SimpleFlag *f = dynamic_cast<SimpleFlag *>(i->second);
|
||||||
|
if (f && f->status())
|
||||||
|
cprintf("%s\n", f->name());
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
|
@ -1,5 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2003-2005 The Regents of The University of Michigan
|
* Copyright (c) 2003-2005 The Regents of The University of Michigan
|
||||||
|
* Copyright (c) 2010 The Hewlett-Packard Development Company
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
@ -31,10 +32,84 @@
|
||||||
#ifndef __BASE_DEBUG_HH__
|
#ifndef __BASE_DEBUG_HH__
|
||||||
#define __BASE_DEBUG_HH__
|
#define __BASE_DEBUG_HH__
|
||||||
|
|
||||||
|
#include <string>
|
||||||
|
#include <vector>
|
||||||
|
|
||||||
namespace Debug {
|
namespace Debug {
|
||||||
|
|
||||||
void breakpoint();
|
void breakpoint();
|
||||||
|
|
||||||
|
class Flag
|
||||||
|
{
|
||||||
|
protected:
|
||||||
|
const char *_name;
|
||||||
|
const char *_desc;
|
||||||
|
|
||||||
|
public:
|
||||||
|
Flag(const char *name, const char *desc);
|
||||||
|
virtual ~Flag();
|
||||||
|
|
||||||
|
std::string name() const { return _name; }
|
||||||
|
std::string desc() const { return _desc; }
|
||||||
|
|
||||||
|
virtual void enable() = 0;
|
||||||
|
virtual void disable() = 0;
|
||||||
|
};
|
||||||
|
|
||||||
|
class SimpleFlag : public Flag
|
||||||
|
{
|
||||||
|
protected:
|
||||||
|
bool _status;
|
||||||
|
|
||||||
|
public:
|
||||||
|
SimpleFlag(const char *name, const char *desc)
|
||||||
|
: Flag(name, desc)
|
||||||
|
{ }
|
||||||
|
|
||||||
|
bool status() const { return _status; }
|
||||||
|
operator bool() const { return _status; }
|
||||||
|
bool operator!() const { return !_status; }
|
||||||
|
|
||||||
|
void enable() { _status = true; }
|
||||||
|
void disable() { _status = false; }
|
||||||
|
};
|
||||||
|
|
||||||
|
class CompoundFlag : public SimpleFlag
|
||||||
|
{
|
||||||
|
protected:
|
||||||
|
std::vector<Flag *> flags;
|
||||||
|
|
||||||
|
public:
|
||||||
|
CompoundFlag(const char *name, const char *desc,
|
||||||
|
Flag &f00 = *(Flag *)0, Flag &f01 = *(Flag *)0,
|
||||||
|
Flag &f02 = *(Flag *)0, Flag &f03 = *(Flag *)0,
|
||||||
|
Flag &f04 = *(Flag *)0, Flag &f05 = *(Flag *)0,
|
||||||
|
Flag &f06 = *(Flag *)0, Flag &f07 = *(Flag *)0,
|
||||||
|
Flag &f08 = *(Flag *)0, Flag &f09 = *(Flag *)0,
|
||||||
|
Flag &f10 = *(Flag *)0, Flag &f11 = *(Flag *)0,
|
||||||
|
Flag &f12 = *(Flag *)0, Flag &f13 = *(Flag *)0,
|
||||||
|
Flag &f14 = *(Flag *)0, Flag &f15 = *(Flag *)0,
|
||||||
|
Flag &f16 = *(Flag *)0, Flag &f17 = *(Flag *)0,
|
||||||
|
Flag &f18 = *(Flag *)0, Flag &f19 = *(Flag *)0)
|
||||||
|
: SimpleFlag(name, desc)
|
||||||
|
{
|
||||||
|
addFlag(f00); addFlag(f01); addFlag(f02); addFlag(f03); addFlag(f04);
|
||||||
|
addFlag(f05); addFlag(f06); addFlag(f07); addFlag(f08); addFlag(f09);
|
||||||
|
addFlag(f10); addFlag(f11); addFlag(f12); addFlag(f13); addFlag(f14);
|
||||||
|
addFlag(f15); addFlag(f16); addFlag(f17); addFlag(f18); addFlag(f19);
|
||||||
|
}
|
||||||
|
|
||||||
|
void
|
||||||
|
addFlag(Flag &f)
|
||||||
|
{
|
||||||
|
if (&f != NULL)
|
||||||
|
flags.push_back(&f);
|
||||||
|
}
|
||||||
|
|
||||||
|
void enable();
|
||||||
|
void disable();
|
||||||
|
};
|
||||||
|
|
||||||
} // namespace Debug
|
} // namespace Debug
|
||||||
|
|
||||||
#endif // __BASE_DEBUG_HH__
|
#endif // __BASE_DEBUG_HH__
|
||||||
|
|
|
@ -34,6 +34,7 @@
|
||||||
#include "base/loader/exec_aout.h"
|
#include "base/loader/exec_aout.h"
|
||||||
#include "base/loader/symtab.hh"
|
#include "base/loader/symtab.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
|
#include "debug/Loader.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
||||||
|
|
|
@ -35,6 +35,7 @@
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "base/types.hh"
|
#include "base/types.hh"
|
||||||
|
#include "debug/Loader.hh"
|
||||||
|
|
||||||
// Only alpha will be able to load ecoff files for now.
|
// Only alpha will be able to load ecoff files for now.
|
||||||
// base/types.hh and ecoff_machdep.h must be before the other .h files
|
// base/types.hh and ecoff_machdep.h must be before the other .h files
|
||||||
|
|
|
@ -37,6 +37,7 @@
|
||||||
#include "base/bitfield.hh"
|
#include "base/bitfield.hh"
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
|
#include "debug/Loader.hh"
|
||||||
#include "sim/byteswap.hh"
|
#include "sim/byteswap.hh"
|
||||||
#include "gelf.h"
|
#include "gelf.h"
|
||||||
|
|
||||||
|
|
|
@ -31,6 +31,7 @@
|
||||||
#include "base/loader/raw_object.hh"
|
#include "base/loader/raw_object.hh"
|
||||||
#include "base/loader/symtab.hh"
|
#include "base/loader/symtab.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
|
#include "debug/Loader.hh"
|
||||||
|
|
||||||
ObjectFile *
|
ObjectFile *
|
||||||
RawObject::tryFile(const std::string &fname, int fd, size_t len, uint8_t *data)
|
RawObject::tryFile(const std::string &fname, int fd, size_t len, uint8_t *data)
|
||||||
|
|
|
@ -32,6 +32,7 @@
|
||||||
|
|
||||||
#include "base/mysql.hh"
|
#include "base/mysql.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
|
#include "debug/SQL.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
||||||
|
|
|
@ -136,11 +136,13 @@
|
||||||
#include "config/the_isa.hh"
|
#include "config/the_isa.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/GDBAll.hh"
|
||||||
#include "mem/port.hh"
|
#include "mem/port.hh"
|
||||||
#include "mem/translating_port.hh"
|
#include "mem/translating_port.hh"
|
||||||
#include "sim/system.hh"
|
#include "sim/system.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
using namespace Debug;
|
||||||
using namespace TheISA;
|
using namespace TheISA;
|
||||||
|
|
||||||
#ifndef NDEBUG
|
#ifndef NDEBUG
|
||||||
|
|
|
@ -32,9 +32,7 @@
|
||||||
#include <cctype>
|
#include <cctype>
|
||||||
#include <fstream>
|
#include <fstream>
|
||||||
#include <iostream>
|
#include <iostream>
|
||||||
#include <list>
|
|
||||||
#include <string>
|
#include <string>
|
||||||
#include <vector>
|
|
||||||
|
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "base/output.hh"
|
#include "base/output.hh"
|
||||||
|
@ -45,8 +43,8 @@
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
||||||
namespace Trace {
|
namespace Trace {
|
||||||
|
|
||||||
const string DefaultName("global");
|
const string DefaultName("global");
|
||||||
FlagVec flags(NumFlags, false);
|
|
||||||
bool enabled = false;
|
bool enabled = false;
|
||||||
|
|
||||||
//
|
//
|
||||||
|
@ -149,63 +147,4 @@ dump(Tick when, const std::string &name, const void *d, int len)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
bool
|
|
||||||
changeFlag(const char *s, bool value)
|
|
||||||
{
|
|
||||||
using namespace Trace;
|
|
||||||
std::string str(s);
|
|
||||||
|
|
||||||
for (int i = 0; i < numFlagStrings; ++i) {
|
|
||||||
if (str != flagStrings[i])
|
|
||||||
continue;
|
|
||||||
|
|
||||||
if (i < NumFlags) {
|
|
||||||
flags[i] = value;
|
|
||||||
} else {
|
|
||||||
i -= NumFlags;
|
|
||||||
|
|
||||||
const Flags *flagVec = compoundFlags[i];
|
|
||||||
for (int j = 0; flagVec[j] != -1; ++j) {
|
|
||||||
if (flagVec[j] < NumFlags)
|
|
||||||
flags[flagVec[j]] = value;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
// the flag was not found.
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
void
|
|
||||||
dumpStatus()
|
|
||||||
{
|
|
||||||
using namespace Trace;
|
|
||||||
for (int i = 0; i < numFlagStrings; ++i) {
|
|
||||||
if (flags[i])
|
|
||||||
cprintf("%s\n", flagStrings[i]);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
} // namespace Trace
|
} // namespace Trace
|
||||||
|
|
||||||
|
|
||||||
// add a set of functions that can easily be invoked from gdb
|
|
||||||
void
|
|
||||||
setTraceFlag(const char *string)
|
|
||||||
{
|
|
||||||
Trace::changeFlag(string, true);
|
|
||||||
}
|
|
||||||
|
|
||||||
void
|
|
||||||
clearTraceFlag(const char *string)
|
|
||||||
{
|
|
||||||
Trace::changeFlag(string, false);
|
|
||||||
}
|
|
||||||
|
|
||||||
void
|
|
||||||
dumpTraceStatus()
|
|
||||||
{
|
|
||||||
Trace::dumpStatus();
|
|
||||||
}
|
|
||||||
|
|
|
@ -33,23 +33,22 @@
|
||||||
#define __BASE_TRACE_HH__
|
#define __BASE_TRACE_HH__
|
||||||
|
|
||||||
#include <string>
|
#include <string>
|
||||||
#include <vector>
|
|
||||||
|
|
||||||
#include "base/cprintf.hh"
|
#include "base/cprintf.hh"
|
||||||
|
#include "base/debug.hh"
|
||||||
#include "base/match.hh"
|
#include "base/match.hh"
|
||||||
#include "base/traceflags.hh"
|
|
||||||
#include "base/types.hh"
|
#include "base/types.hh"
|
||||||
#include "sim/core.hh"
|
#include "sim/core.hh"
|
||||||
|
|
||||||
namespace Trace {
|
namespace Trace {
|
||||||
|
|
||||||
|
using Debug::SimpleFlag;
|
||||||
|
using Debug::CompoundFlag;
|
||||||
|
|
||||||
std::ostream &output();
|
std::ostream &output();
|
||||||
void setOutput(const std::string &filename);
|
void setOutput(const std::string &filename);
|
||||||
|
|
||||||
extern bool enabled;
|
extern bool enabled;
|
||||||
typedef std::vector<bool> FlagVec;
|
|
||||||
extern FlagVec flags;
|
|
||||||
inline bool IsOn(int t) { return flags[t]; }
|
|
||||||
bool changeFlag(const char *str, bool value);
|
bool changeFlag(const char *str, bool value);
|
||||||
void dumpStatus();
|
void dumpStatus();
|
||||||
|
|
||||||
|
@ -85,25 +84,28 @@ inline const std::string &name() { return Trace::DefaultName; }
|
||||||
|
|
||||||
#if TRACING_ON
|
#if TRACING_ON
|
||||||
|
|
||||||
#define DTRACE(x) (Trace::IsOn(Trace::x) && Trace::enabled)
|
#define DTRACE(x) ((Debug::x) && Trace::enabled)
|
||||||
|
|
||||||
#define DDUMP(x, data, count) do { \
|
#define DDUMP(x, data, count) do { \
|
||||||
|
using namespace Debug; \
|
||||||
if (DTRACE(x)) \
|
if (DTRACE(x)) \
|
||||||
Trace::dump(curTick(), name(), data, count); \
|
Trace::dump(curTick(), name(), data, count); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
#define DPRINTF(x, ...) do { \
|
#define DPRINTF(x, ...) do { \
|
||||||
|
using namespace Debug; \
|
||||||
if (DTRACE(x)) \
|
if (DTRACE(x)) \
|
||||||
Trace::dprintf(curTick(), name(), __VA_ARGS__); \
|
Trace::dprintf(curTick(), name(), __VA_ARGS__); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
#define DPRINTFS(x,s, ...) do { \
|
#define DPRINTFS(x, s, ...) do { \
|
||||||
|
using namespace Debug; \
|
||||||
if (DTRACE(x)) \
|
if (DTRACE(x)) \
|
||||||
Trace::dprintf(curTick(), s->name(), __VA_ARGS__); \
|
Trace::dprintf(curTick(), s->name(), __VA_ARGS__); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
|
|
||||||
#define DPRINTFR(x, ...) do { \
|
#define DPRINTFR(x, ...) do { \
|
||||||
|
using namespace Debug; \
|
||||||
if (DTRACE(x)) \
|
if (DTRACE(x)) \
|
||||||
Trace::dprintf((Tick)-1, std::string(), __VA_ARGS__); \
|
Trace::dprintf((Tick)-1, std::string(), __VA_ARGS__); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
#include "base/misc.hh"
|
#include "base/misc.hh"
|
||||||
#include "base/socket.hh"
|
#include "base/socket.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
|
#include "debug/VNC.hh"
|
||||||
#include "sim/byteswap.hh"
|
#include "sim/byteswap.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -173,6 +173,10 @@ TraceFlag('IntrControl')
|
||||||
TraceFlag('PCEvent')
|
TraceFlag('PCEvent')
|
||||||
TraceFlag('Quiesce')
|
TraceFlag('Quiesce')
|
||||||
|
|
||||||
|
CompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr',
|
||||||
|
'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta',
|
||||||
|
'ExecResult', 'ExecSpeculative', 'ExecSymbol', 'ExecThread',
|
||||||
|
'ExecTicks', 'ExecMicro', 'ExecMacro' ])
|
||||||
CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
|
CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
|
||||||
'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecFaulting' ])
|
'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecFaulting' ])
|
||||||
CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
|
CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
|
||||||
|
|
|
@ -32,6 +32,7 @@
|
||||||
|
|
||||||
#include "cpu/activity.hh"
|
#include "cpu/activity.hh"
|
||||||
#include "cpu/timebuf.hh"
|
#include "cpu/timebuf.hh"
|
||||||
|
#include "debug/Activity.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
||||||
|
|
|
@ -45,6 +45,7 @@
|
||||||
#include "cpu/cpuevent.hh"
|
#include "cpu/cpuevent.hh"
|
||||||
#include "cpu/profile.hh"
|
#include "cpu/profile.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/SyscallVerbose.hh"
|
||||||
#include "params/BaseCPU.hh"
|
#include "params/BaseCPU.hh"
|
||||||
#include "sim/process.hh"
|
#include "sim/process.hh"
|
||||||
#include "sim/sim_events.hh"
|
#include "sim/sim_events.hh"
|
||||||
|
|
|
@ -50,6 +50,8 @@
|
||||||
#include "config/the_isa.hh"
|
#include "config/the_isa.hh"
|
||||||
#include "cpu/base_dyn_inst.hh"
|
#include "cpu/base_dyn_inst.hh"
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
|
#include "debug/DynInst.hh"
|
||||||
|
#include "debug/IQ.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
#include "sim/faults.hh"
|
#include "sim/faults.hh"
|
||||||
|
|
||||||
|
|
|
@ -41,6 +41,7 @@
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/ExecAll.hh"
|
||||||
#include "enums/OpClass.hh"
|
#include "enums/OpClass.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
@ -59,22 +60,21 @@ Trace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran)
|
||||||
{
|
{
|
||||||
ostream &outs = Trace::output();
|
ostream &outs = Trace::output();
|
||||||
|
|
||||||
if (IsOn(ExecTicks))
|
if (Debug::ExecTicks)
|
||||||
dumpTicks(outs);
|
dumpTicks(outs);
|
||||||
|
|
||||||
outs << thread->getCpuPtr()->name() << " ";
|
outs << thread->getCpuPtr()->name() << " ";
|
||||||
|
|
||||||
if (IsOn(ExecSpeculative))
|
if (Debug::ExecSpeculative)
|
||||||
outs << (misspeculating ? "-" : "+") << " ";
|
outs << (misspeculating ? "-" : "+") << " ";
|
||||||
|
|
||||||
if (IsOn(ExecThread))
|
if (Debug::ExecThread)
|
||||||
outs << "T" << thread->threadId() << " : ";
|
outs << "T" << thread->threadId() << " : ";
|
||||||
|
|
||||||
std::string sym_str;
|
std::string sym_str;
|
||||||
Addr sym_addr;
|
Addr sym_addr;
|
||||||
Addr cur_pc = pc.instAddr();
|
Addr cur_pc = pc.instAddr();
|
||||||
if (debugSymbolTable
|
if (debugSymbolTable && Debug::ExecSymbol
|
||||||
&& IsOn(ExecSymbol)
|
|
||||||
#if FULL_SYSTEM
|
#if FULL_SYSTEM
|
||||||
&& !inUserMode(thread)
|
&& !inUserMode(thread)
|
||||||
#endif
|
#endif
|
||||||
|
@ -104,25 +104,25 @@ Trace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran)
|
||||||
if (ran) {
|
if (ran) {
|
||||||
outs << " : ";
|
outs << " : ";
|
||||||
|
|
||||||
if (IsOn(ExecOpClass)) {
|
if (Debug::ExecOpClass) {
|
||||||
outs << Enums::OpClassStrings[inst->opClass()] << " : ";
|
outs << Enums::OpClassStrings[inst->opClass()] << " : ";
|
||||||
}
|
}
|
||||||
|
|
||||||
if (IsOn(ExecResult) && predicate == false) {
|
if (Debug::ExecResult && predicate == false) {
|
||||||
outs << "Predicated False";
|
outs << "Predicated False";
|
||||||
}
|
}
|
||||||
|
|
||||||
if (IsOn(ExecResult) && data_status != DataInvalid) {
|
if (Debug::ExecResult && data_status != DataInvalid) {
|
||||||
ccprintf(outs, " D=%#018x", data.as_int);
|
ccprintf(outs, " D=%#018x", data.as_int);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (IsOn(ExecEffAddr) && addr_valid)
|
if (Debug::ExecEffAddr && addr_valid)
|
||||||
outs << " A=0x" << hex << addr;
|
outs << " A=0x" << hex << addr;
|
||||||
|
|
||||||
if (IsOn(ExecFetchSeq) && fetch_seq_valid)
|
if (Debug::ExecFetchSeq && fetch_seq_valid)
|
||||||
outs << " FetchSeq=" << dec << fetch_seq;
|
outs << " FetchSeq=" << dec << fetch_seq;
|
||||||
|
|
||||||
if (IsOn(ExecCPSeq) && cp_seq_valid)
|
if (Debug::ExecCPSeq && cp_seq_valid)
|
||||||
outs << " CPSeq=" << dec << cp_seq;
|
outs << " CPSeq=" << dec << cp_seq;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -143,14 +143,14 @@ Trace::ExeTracerRecord::dump()
|
||||||
* finishes. Macroops then behave like regular instructions and don't
|
* finishes. Macroops then behave like regular instructions and don't
|
||||||
* complete/print when they fault.
|
* complete/print when they fault.
|
||||||
*/
|
*/
|
||||||
if (IsOn(ExecMacro) && staticInst->isMicroop() &&
|
if (Debug::ExecMacro && staticInst->isMicroop() &&
|
||||||
((IsOn(ExecMicro) &&
|
((Debug::ExecMicro &&
|
||||||
macroStaticInst && staticInst->isFirstMicroop()) ||
|
macroStaticInst && staticInst->isFirstMicroop()) ||
|
||||||
(!IsOn(ExecMicro) &&
|
(!Debug::ExecMicro &&
|
||||||
macroStaticInst && staticInst->isLastMicroop()))) {
|
macroStaticInst && staticInst->isLastMicroop()))) {
|
||||||
traceInst(macroStaticInst, false);
|
traceInst(macroStaticInst, false);
|
||||||
}
|
}
|
||||||
if (IsOn(ExecMicro) || !staticInst->isMicroop()) {
|
if (Debug::ExecMicro || !staticInst->isMicroop()) {
|
||||||
traceInst(staticInst, true);
|
traceInst(staticInst, true);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -36,6 +36,8 @@
|
||||||
#include "base/types.hh"
|
#include "base/types.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/ExecEnable.hh"
|
||||||
|
#include "debug/ExecSpeculative.hh"
|
||||||
#include "params/ExeTracer.hh"
|
#include "params/ExeTracer.hh"
|
||||||
#include "sim/insttracer.hh"
|
#include "sim/insttracer.hh"
|
||||||
|
|
||||||
|
@ -72,13 +74,13 @@ class ExeTracer : public InstTracer
|
||||||
const StaticInstPtr staticInst, TheISA::PCState pc,
|
const StaticInstPtr staticInst, TheISA::PCState pc,
|
||||||
const StaticInstPtr macroStaticInst = NULL)
|
const StaticInstPtr macroStaticInst = NULL)
|
||||||
{
|
{
|
||||||
if (!IsOn(ExecEnable))
|
if (!Debug::ExecEnable)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
if (!Trace::enabled)
|
if (!Trace::enabled)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
if (!IsOn(ExecSpeculative) && tc->misspeculating())
|
if (!Debug::ExecSpeculative && tc->misspeculating())
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
return new ExeTracerRecord(when, tc,
|
return new ExeTracerRecord(when, tc,
|
||||||
|
|
|
@ -47,6 +47,10 @@
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
#include "cpu/simple_thread.hh"
|
#include "cpu/simple_thread.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/Activity.hh"
|
||||||
|
#include "debug/InOrderCPU.hh"
|
||||||
|
#include "debug/RefCount.hh"
|
||||||
|
#include "debug/SkedCache.hh"
|
||||||
#include "mem/translating_port.hh"
|
#include "mem/translating_port.hh"
|
||||||
#include "params/InOrderCPU.hh"
|
#include "params/InOrderCPU.hh"
|
||||||
#include "sim/process.hh"
|
#include "sim/process.hh"
|
||||||
|
|
|
@ -34,6 +34,7 @@
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/first_stage.hh"
|
#include "cpu/inorder/first_stage.hh"
|
||||||
#include "cpu/inorder/resource_pool.hh"
|
#include "cpu/inorder/resource_pool.hh"
|
||||||
|
#include "debug/InOrderStage.hh"
|
||||||
#include "params/InOrderTrace.hh"
|
#include "params/InOrderTrace.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -41,6 +41,7 @@
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/inorder_dyn_inst.hh"
|
#include "cpu/inorder/inorder_dyn_inst.hh"
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
|
#include "debug/InOrderDynInst.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -57,6 +57,7 @@
|
||||||
#include "cpu/op_class.hh"
|
#include "cpu/op_class.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/InOrderDynInst.hh"
|
||||||
#include "mem/packet.hh"
|
#include "mem/packet.hh"
|
||||||
#include "sim/system.hh"
|
#include "sim/system.hh"
|
||||||
|
|
||||||
|
|
|
@ -37,6 +37,7 @@
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/ExecEnable.hh"
|
||||||
#include "params/InOrderTrace.hh"
|
#include "params/InOrderTrace.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
@ -64,7 +65,7 @@ InOrderTraceRecord *
|
||||||
InOrderTrace::getInstRecord(unsigned num_stages, bool stage_tracing,
|
InOrderTrace::getInstRecord(unsigned num_stages, bool stage_tracing,
|
||||||
ThreadContext *tc)
|
ThreadContext *tc)
|
||||||
{
|
{
|
||||||
if (!IsOn(ExecEnable))
|
if (!Debug::ExecEnable)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
if (!Trace::enabled)
|
if (!Trace::enabled)
|
||||||
|
|
|
@ -34,6 +34,11 @@
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/pipeline_stage.hh"
|
#include "cpu/inorder/pipeline_stage.hh"
|
||||||
#include "cpu/inorder/resource_pool.hh"
|
#include "cpu/inorder/resource_pool.hh"
|
||||||
|
#include "debug/Activity.hh"
|
||||||
|
#include "debug/InOrderStage.hh"
|
||||||
|
#include "debug/InOrderStall.hh"
|
||||||
|
#include "debug/Resource.hh"
|
||||||
|
#include "debug/ThreadModel.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace ThePipeline;
|
using namespace ThePipeline;
|
||||||
|
|
|
@ -35,6 +35,7 @@
|
||||||
#include "cpu/inorder/inorder_dyn_inst.hh"
|
#include "cpu/inorder/inorder_dyn_inst.hh"
|
||||||
#include "cpu/inorder/pipeline_traits.hh"
|
#include "cpu/inorder/pipeline_traits.hh"
|
||||||
#include "cpu/inorder/reg_dep_map.hh"
|
#include "cpu/inorder/reg_dep_map.hh"
|
||||||
|
#include "debug/RegDepMap.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace TheISA;
|
using namespace TheISA;
|
||||||
|
|
|
@ -35,6 +35,10 @@
|
||||||
#include "base/str.hh"
|
#include "base/str.hh"
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/resource.hh"
|
#include "cpu/inorder/resource.hh"
|
||||||
|
#include "debug/RefCount.hh"
|
||||||
|
#include "debug/ResReqCount.hh"
|
||||||
|
#include "debug/Resource.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
||||||
Resource::Resource(string res_name, int res_id, int res_width,
|
Resource::Resource(string res_name, int res_id, int res_width,
|
||||||
|
|
|
@ -34,6 +34,7 @@
|
||||||
|
|
||||||
#include "cpu/inorder/resources/resource_list.hh"
|
#include "cpu/inorder/resources/resource_list.hh"
|
||||||
#include "cpu/inorder/resource_pool.hh"
|
#include "cpu/inorder/resource_pool.hh"
|
||||||
|
#include "debug/Resource.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace ThePipeline;
|
using namespace ThePipeline;
|
||||||
|
|
|
@ -35,6 +35,7 @@
|
||||||
|
|
||||||
#include "cpu/inorder/pipeline_traits.hh"
|
#include "cpu/inorder/pipeline_traits.hh"
|
||||||
#include "cpu/inorder/resource_sked.hh"
|
#include "cpu/inorder/resource_sked.hh"
|
||||||
|
#include "debug/SkedCache.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace ThePipeline;
|
using namespace ThePipeline;
|
||||||
|
|
|
@ -30,6 +30,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "cpu/inorder/resources/agen_unit.hh"
|
#include "cpu/inorder/resources/agen_unit.hh"
|
||||||
|
#include "debug/InOrderAGEN.hh"
|
||||||
|
|
||||||
AGENUnit::AGENUnit(std::string res_name, int res_id, int res_width,
|
AGENUnit::AGENUnit(std::string res_name, int res_id, int res_width,
|
||||||
int res_latency, InOrderCPU *_cpu,
|
int res_latency, InOrderCPU *_cpu,
|
||||||
|
|
|
@ -33,9 +33,10 @@
|
||||||
|
|
||||||
#include "arch/utility.hh"
|
#include "arch/utility.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "base/traceflags.hh"
|
|
||||||
#include "config/the_isa.hh"
|
#include "config/the_isa.hh"
|
||||||
#include "cpu/inorder/resources/bpred_unit.hh"
|
#include "cpu/inorder/resources/bpred_unit.hh"
|
||||||
|
#include "debug/InOrderBPred.hh"
|
||||||
|
#include "debug/Resource.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace ThePipeline;
|
using namespace ThePipeline;
|
||||||
|
|
|
@ -31,6 +31,8 @@
|
||||||
|
|
||||||
#include "config/the_isa.hh"
|
#include "config/the_isa.hh"
|
||||||
#include "cpu/inorder/resources/branch_predictor.hh"
|
#include "cpu/inorder/resources/branch_predictor.hh"
|
||||||
|
#include "debug/InOrderBPred.hh"
|
||||||
|
#include "debug/InOrderStage.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace TheISA;
|
using namespace TheISA;
|
||||||
|
|
|
@ -41,6 +41,14 @@
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/pipeline_traits.hh"
|
#include "cpu/inorder/pipeline_traits.hh"
|
||||||
#include "cpu/inorder/resource_pool.hh"
|
#include "cpu/inorder/resource_pool.hh"
|
||||||
|
#include "debug/Activity.hh"
|
||||||
|
#include "debug/AddrDep.hh"
|
||||||
|
#include "debug/InOrderCachePort.hh"
|
||||||
|
#include "debug/InOrderStall.hh"
|
||||||
|
#include "debug/InOrderTLB.hh"
|
||||||
|
#include "debug/LLSC.hh"
|
||||||
|
#include "debug/RefCount.hh"
|
||||||
|
#include "debug/ThreadModel.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -31,6 +31,9 @@
|
||||||
|
|
||||||
#include "config/the_isa.hh"
|
#include "config/the_isa.hh"
|
||||||
#include "cpu/inorder/resources/decode_unit.hh"
|
#include "cpu/inorder/resources/decode_unit.hh"
|
||||||
|
#include "debug/InOrderDecode.hh"
|
||||||
|
#include "debug/InOrderStall.hh"
|
||||||
|
#include "debug/Resource.hh"
|
||||||
|
|
||||||
using namespace TheISA;
|
using namespace TheISA;
|
||||||
using namespace ThePipeline;
|
using namespace ThePipeline;
|
||||||
|
|
|
@ -35,6 +35,8 @@
|
||||||
#include "cpu/inorder/resources/execution_unit.hh"
|
#include "cpu/inorder/resources/execution_unit.hh"
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/resource_pool.hh"
|
#include "cpu/inorder/resource_pool.hh"
|
||||||
|
#include "debug/InOrderExecute.hh"
|
||||||
|
#include "debug/InOrderStall.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace ThePipeline;
|
using namespace ThePipeline;
|
||||||
|
|
|
@ -32,6 +32,8 @@
|
||||||
#include "config/the_isa.hh"
|
#include "config/the_isa.hh"
|
||||||
#include "cpu/inorder/resources/fetch_seq_unit.hh"
|
#include "cpu/inorder/resources/fetch_seq_unit.hh"
|
||||||
#include "cpu/inorder/resource_pool.hh"
|
#include "cpu/inorder/resource_pool.hh"
|
||||||
|
#include "debug/InOrderFetchSeq.hh"
|
||||||
|
#include "debug/InOrderStall.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace TheISA;
|
using namespace TheISA;
|
||||||
|
|
|
@ -42,6 +42,11 @@
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/pipeline_traits.hh"
|
#include "cpu/inorder/pipeline_traits.hh"
|
||||||
#include "cpu/inorder/resource_pool.hh"
|
#include "cpu/inorder/resource_pool.hh"
|
||||||
|
#include "debug/Activity.hh"
|
||||||
|
#include "debug/InOrderCachePort.hh"
|
||||||
|
#include "debug/InOrderStall.hh"
|
||||||
|
#include "debug/RefCount.hh"
|
||||||
|
#include "debug/ThreadModel.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -30,6 +30,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "cpu/inorder/resources/graduation_unit.hh"
|
#include "cpu/inorder/resources/graduation_unit.hh"
|
||||||
|
#include "debug/InOrderGraduation.hh"
|
||||||
|
|
||||||
using namespace ThePipeline;
|
using namespace ThePipeline;
|
||||||
|
|
||||||
|
|
|
@ -37,6 +37,8 @@
|
||||||
#include "cpu/inorder/resources/inst_buffer.hh"
|
#include "cpu/inorder/resources/inst_buffer.hh"
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/pipeline_traits.hh"
|
#include "cpu/inorder/pipeline_traits.hh"
|
||||||
|
#include "debug/InOrderInstBuffer.hh"
|
||||||
|
#include "debug/Resource.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace TheISA;
|
using namespace TheISA;
|
||||||
|
|
|
@ -36,6 +36,8 @@
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/resource_pool.hh"
|
#include "cpu/inorder/resource_pool.hh"
|
||||||
#include "cpu/op_class.hh"
|
#include "cpu/op_class.hh"
|
||||||
|
#include "debug/InOrderMDU.hh"
|
||||||
|
#include "debug/Resource.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace ThePipeline;
|
using namespace ThePipeline;
|
||||||
|
|
|
@ -37,6 +37,8 @@
|
||||||
#include "cpu/inorder/resources/use_def.hh"
|
#include "cpu/inorder/resources/use_def.hh"
|
||||||
#include "cpu/inorder/cpu.hh"
|
#include "cpu/inorder/cpu.hh"
|
||||||
#include "cpu/inorder/pipeline_traits.hh"
|
#include "cpu/inorder/pipeline_traits.hh"
|
||||||
|
#include "debug/InOrderStall.hh"
|
||||||
|
#include "debug/InOrderUseDef.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
using namespace TheISA;
|
using namespace TheISA;
|
||||||
|
|
|
@ -33,6 +33,7 @@
|
||||||
#include "config/the_isa.hh"
|
#include "config/the_isa.hh"
|
||||||
#include "cpu/inorder/thread_context.hh"
|
#include "cpu/inorder/thread_context.hh"
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
|
#include "debug/InOrderCPU.hh"
|
||||||
|
|
||||||
using namespace TheISA;
|
using namespace TheISA;
|
||||||
|
|
||||||
|
|
|
@ -35,6 +35,8 @@
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "base/types.hh"
|
#include "base/types.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
|
#include "debug/ExecEnable.hh"
|
||||||
|
#include "debug/ExecSpeculative.hh"
|
||||||
#include "params/IntelTrace.hh"
|
#include "params/IntelTrace.hh"
|
||||||
#include "sim/insttracer.hh"
|
#include "sim/insttracer.hh"
|
||||||
|
|
||||||
|
@ -68,13 +70,13 @@ class IntelTrace : public InstTracer
|
||||||
const StaticInstPtr staticInst, TheISA::PCState pc,
|
const StaticInstPtr staticInst, TheISA::PCState pc,
|
||||||
const StaticInstPtr macroStaticInst = NULL)
|
const StaticInstPtr macroStaticInst = NULL)
|
||||||
{
|
{
|
||||||
if (!IsOn(ExecEnable))
|
if (!Debug::ExecEnable)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
if (!Trace::enabled)
|
if (!Trace::enabled)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
if (!IsOn(ExecSpeculative) && tc->misspeculating())
|
if (!Debug::ExecSpeculative && tc->misspeculating())
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
return new IntelTraceRecord(when, tc,
|
return new IntelTraceRecord(when, tc,
|
||||||
|
|
|
@ -36,6 +36,7 @@
|
||||||
#include "cpu/base.hh"
|
#include "cpu/base.hh"
|
||||||
#include "cpu/intr_control.hh"
|
#include "cpu/intr_control.hh"
|
||||||
#include "cpu/thread_context.hh"
|
#include "cpu/thread_context.hh"
|
||||||
|
#include "debug/IntrControl.hh"
|
||||||
#include "sim/sim_object.hh"
|
#include "sim/sim_object.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -31,6 +31,7 @@
|
||||||
#include "base/socket.hh"
|
#include "base/socket.hh"
|
||||||
#include "cpu/nativetrace.hh"
|
#include "cpu/nativetrace.hh"
|
||||||
#include "cpu/static_inst.hh"
|
#include "cpu/static_inst.hh"
|
||||||
|
#include "debug/GDBMisc.hh"
|
||||||
#include "params/NativeTrace.hh"
|
#include "params/NativeTrace.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
|
@ -34,9 +34,9 @@
|
||||||
#include "arch/types.hh"
|
#include "arch/types.hh"
|
||||||
#include "arch/utility.hh"
|
#include "arch/utility.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "base/traceflags.hh"
|
|
||||||
#include "config/the_isa.hh"
|
#include "config/the_isa.hh"
|
||||||
#include "cpu/o3/bpred_unit.hh"
|
#include "cpu/o3/bpred_unit.hh"
|
||||||
|
#include "debug/Fetch.hh"
|
||||||
#include "params/DerivO3CPU.hh"
|
#include "params/DerivO3CPU.hh"
|
||||||
|
|
||||||
template<class Impl>
|
template<class Impl>
|
||||||
|
|
|
@ -54,6 +54,10 @@
|
||||||
#include "cpu/o3/thread_state.hh"
|
#include "cpu/o3/thread_state.hh"
|
||||||
#include "cpu/exetrace.hh"
|
#include "cpu/exetrace.hh"
|
||||||
#include "cpu/timebuf.hh"
|
#include "cpu/timebuf.hh"
|
||||||
|
#include "debug/Activity.hh"
|
||||||
|
#include "debug/Commit.hh"
|
||||||
|
#include "debug/CommitRate.hh"
|
||||||
|
#include "debug/ExecFaulting.hh"
|
||||||
#include "params/DerivO3CPU.hh"
|
#include "params/DerivO3CPU.hh"
|
||||||
#include "sim/faults.hh"
|
#include "sim/faults.hh"
|
||||||
|
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue