fixes for gcc 4.1

Nate needs to fix sinic builder stuff
Gabe needs to verify my fixes to decoder.isa

OPT/DEBUG compiles for ALPHA_FS, ALPHA_SE, MIPS_SE, SPARC_SE with this changeset

README:
    Fix the swig version in the readme
src/SConscript:
    remove sinic until nate fixes the builder crap for it
src/arch/alpha/system.hh:
src/arch/mips/isa/includes.isa:
src/arch/sparc/isa/decoder.isa:
src/base/stats/visit.cc:
src/base/timebuf.hh:
src/dev/ide_disk.cc:
src/dev/sinic.cc:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr_queue.cc:
src/mem/packet.hh:
src/mem/request.hh:
src/sim/builder.hh:
src/sim/system.hh:
    fixes for gcc 4.1

--HG--
extra : convert_revision : 3775427c0047b282574d4831dd602c96cac3ba17
This commit is contained in:
Ali Saidi 2006-08-15 17:41:22 -04:00
parent 0748851071
commit ed58f77c47
15 changed files with 77 additions and 35 deletions

2
README
View file

@ -12,7 +12,7 @@ Short version:
1. If you don't have SCons version 0.96.91 or newer, get it from
http://wwww.scons.org.
2. If you don't have SWIG version 0.96.91 or newer, get it from
2. If you don't have SWIG version 1.3.28 or newer, get it from
http://wwww.swig.org.
3. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'. This

View file

@ -230,7 +230,6 @@ full_system_sources = Split('''
dev/platform.cc
dev/simconsole.cc
dev/simple_disk.cc
dev/sinic.cc
dev/tsunami.cc
dev/tsunami_cchip.cc
dev/tsunami_io.cc
@ -250,6 +249,7 @@ full_system_sources = Split('''
sim/pseudo_inst.cc
''')
#dev/sinic.cc
if env['TARGET_ISA'] == 'alpha':

View file

@ -91,14 +91,14 @@ class AlphaSystem : public System
/** Add a function-based event to PALcode. */
template <class T>
T *AlphaSystem::addPalFuncEvent(const char *lbl)
T *addPalFuncEvent(const char *lbl)
{
return addFuncEvent<T>(palSymtab, lbl);
}
/** Add a function-based event to the console code. */
template <class T>
T *AlphaSystem::addConsoleFuncEvent(const char *lbl)
T *addConsoleFuncEvent(const char *lbl)
{
return addFuncEvent<T>(consoleSymtab, lbl);
}

View file

@ -75,6 +75,7 @@ output exec {{
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "sim/sim_exit.hh"
#include "mem/packet_impl.hh"
using namespace MipsISA;
}};

View file

@ -220,7 +220,7 @@ decode OP default Unknown::unknown()
,{{0}},{{0}},{{0}},{{0}});
0x1E: udivcc({{
uint32_t resTemp, val2 = Rs2_or_imm13.udw;
int32_t overflow;
int32_t overflow = 0;
if(val2 == 0) fault = new DivisionByZero;
else
{
@ -236,7 +236,7 @@ decode OP default Unknown::unknown()
);
0x1F: sdivcc({{
int32_t resTemp, val2 = Rs2_or_imm13.sdw;
int32_t overflow, underflow;
int32_t overflow = 0, underflow = 0;
if(val2 == 0) fault = new DivisionByZero;
else
{
@ -244,7 +244,7 @@ decode OP default Unknown::unknown()
overflow = (resTemp<63:31> != 0);
underflow = (resTemp<63:> && resTemp<62:31> != 0xFFFFFFFF);
if(overflow) Rd = resTemp = 0x7FFFFFFF;
else if(underflow) Rd = resTemp = 0xFFFFFFFF80000000ULL;
else if(underflow) resTemp = Rd = 0xFFFFFFFF80000000ULL;
else Rd = resTemp;
} }},
{{0}},
@ -272,7 +272,7 @@ decode OP default Unknown::unknown()
);
0x22: taddcctv({{
int64_t resTemp, val2 = Rs2_or_imm13;
Rd = Rs1 + val2;
Rd = resTemp = Rs1 + val2;
int32_t overflow = Rs1<1:0> || val2<1:0> ||
(Rs1<31:> == val2<31:> && val2<31:> != Rd<31:>);
if(overflow) fault = new TagOverflow;}},

View file

@ -31,7 +31,6 @@
#include "base/stats/visit.hh"
namespace Stats {
namespace Detail {
Visit::Visit()
{}
@ -39,5 +38,4 @@ Visit::Visit()
Visit::~Visit()
{}
/* namespace Detail */ }
/* namespace Stats */ }

View file

@ -32,6 +32,7 @@
#ifndef __BASE_TIMEBUF_HH__
#define __BASE_TIMEBUF_HH__
#include <cassert>
#include <vector>
template <class T>

View file

@ -110,7 +110,7 @@ IdeDisk::IdeDisk(const string &name, DiskImage *img,
// Number of sectors on disk
driveID.atap_capacity = lba_size;
// Multiword DMA mode 2 and below supported
driveID.atap_dmamode_supp = 0x400;
driveID.atap_dmamode_supp = 0x4;
// Set PIO mode 4 and 3 supported
driveID.atap_piomode_supp = 0x3;
// Set DMA mode 4 and below supported

View file

@ -1598,24 +1598,24 @@ Device::unserialize(Checkpoint *cp, const std::string &section)
}
/* namespace Sinic */ }
BEGIN_DECLARE_SIM_OBJECT_PARAMS(Interface)
BEGIN_DECLARE_SIM_OBJECT_PARAMS_WNS(Sinic, SinicInterface)
SimObjectParam<EtherInt *> peer;
SimObjectParam<Device *> device;
SimObjectParam<Sinic::Device *> device;
END_DECLARE_SIM_OBJECT_PARAMS_WNS(Sinic, SinicInterface)
END_DECLARE_SIM_OBJECT_PARAMS(Interface)
BEGIN_INIT_SIM_OBJECT_PARAMS(Interface)
BEGIN_INIT_SIM_OBJECT_PARAMS_WNS(Sinic, SinicInterface)
INIT_PARAM_DFLT(peer, "peer interface", NULL),
INIT_PARAM(device, "Ethernet device of this interface")
END_INIT_SIM_OBJECT_PARAMS(Interface)
END_INIT_SIM_OBJECT_PARAMS_WNS(Sinic, SinicInterface)
CREATE_SIM_OBJECT(Interface)
CREATE_SIM_OBJECT_WNS(Sinic, SinicInterface)
{
Interface *dev_int = new Interface(getInstanceName(), device);
Sinic::Interface *dev_int = new Sinic::Interface(getInstanceName(), device);
EtherInt *p = (EtherInt *)peer;
if (p) {
@ -1626,10 +1626,10 @@ CREATE_SIM_OBJECT(Interface)
return dev_int;
}
REGISTER_SIM_OBJECT("SinicInt", Interface)
REGISTER_SIM_OBJECT_WNS(Sinic, "SinicInt", SinicInterface)
BEGIN_DECLARE_SIM_OBJECT_PARAMS(Device)
BEGIN_DECLARE_SIM_OBJECT_PARAMS_WNS(Sinic, SinicDevice)
SimObjectParam<System *> system;
@ -1670,9 +1670,9 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(Device)
Param<bool> delay_copy;
Param<bool> virtual_addr;
END_DECLARE_SIM_OBJECT_PARAMS(Device)
END_DECLARE_SIM_OBJECT_PARAMS_WNS(Sinic, SinicDevice)
BEGIN_INIT_SIM_OBJECT_PARAMS(Device)
BEGIN_INIT_SIM_OBJECT_PARAMS_WNS(Sinic, SinicDevice)
INIT_PARAM(system, "System pointer"),
@ -1713,12 +1713,12 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(Device)
INIT_PARAM(delay_copy, ""),
INIT_PARAM(virtual_addr, "")
END_INIT_SIM_OBJECT_PARAMS(Device)
END_INIT_SIM_OBJECT_PARAMS_WNS(Sinic, SinicDevice)
CREATE_SIM_OBJECT(Device)
CREATE_SIM_OBJECT_WNS(Sinic, SinicDevice)
{
Device::Params *params = new Device::Params;
Sinic::Sinic::Device::Params *params = new Device::Params;
params->name = getInstanceName();
params->platform = platform;
params->system = system;
@ -1758,9 +1758,8 @@ CREATE_SIM_OBJECT(Device)
params->delay_copy = delay_copy;
params->virtual_addr = virtual_addr;
return new Device(params);
return new Sinic::Device(params);
}
REGISTER_SIM_OBJECT("Sinic", Device)
REGISTER_SIM_OBJECT_WNS(Sinic, "Sinic", SinicDevice)
/* namespace Sinic */ }

View file

@ -103,8 +103,8 @@ MSHR::deallocate()
assert(ntargets == 0);
pkt = NULL;
inService = false;
allocIter = NULL;
readyIter = NULL;
//allocIter = NULL;
//readyIter = NULL;
}
/*

View file

@ -219,7 +219,7 @@ MSHRQueue::markInService(MSHR* mshr)
}
mshr->inService = true;
pendingList.erase(mshr->readyIter);
mshr->readyIter = NULL;
//mshr->readyIter = NULL;
inServiceMSHRs += 1;
//pendingList.pop_front();
}
@ -227,7 +227,7 @@ MSHRQueue::markInService(MSHR* mshr)
void
MSHRQueue::markPending(MSHR* mshr, Packet::Command cmd)
{
assert(mshr->readyIter == NULL);
//assert(mshr->readyIter == NULL);
mshr->pkt->cmd = cmd;
mshr->pkt->flags &= ~SATISFIED;
mshr->inService = false;

View file

@ -42,6 +42,7 @@
#include "sim/host.hh"
#include "sim/root.hh"
#include <list>
#include <cassert>
struct Packet;
typedef Packet* PacketPtr;

View file

@ -42,6 +42,8 @@
#include "sim/host.hh"
#include "sim/root.hh"
#include <cassert>
class Request;
typedef Request* RequestPtr;

View file

@ -179,5 +179,45 @@ SimObjectClass the##OBJ_CLASS##Class(CLASS_NAME, \
/* see param.hh */ \
DEFINE_SIM_OBJECT_CLASS_NAME(CLASS_NAME, OBJ_CLASS)
/* Macros that use the namespace for sinic... yuk. */
#define BEGIN_DECLARE_SIM_OBJECT_PARAMS_WNS(NAME_SPACE, OBJ_CLASS) \
class NAME_SPACE##OBJ_CLASS##Builder : public SimObjectBuilder \
{ \
public:
#define END_DECLARE_SIM_OBJECT_PARAMS_WNS(NAME_SPACE, OBJ_CLASS) \
\
NAME_SPACE##OBJ_CLASS##Builder(const std::string &iniSection); \
virtual ~NAME_SPACE##OBJ_CLASS##Builder() {} \
\
NAME_SPACE::OBJ_CLASS *create(); \
};
#define BEGIN_INIT_SIM_OBJECT_PARAMS_WNS(NAME_SPACE, OBJ_CLASS) \
NAME_SPACE::OBJ_CLASS##Builder::OBJ_CLASS##Builder(const std::string &iSec) \
: SimObjectBuilder(iSec),
#define END_INIT_SIM_OBJECT_PARAMS_WNS(NAME_SPACE, OBJ_CLASS) \
{ \
}
#define CREATE_SIM_OBJECT_WNS(NAME_SPACE, OBJ_CLASS) \
NAME_SPACE::OBJ_CLASS *NAME_SPACE##OBJ_CLASS##Builder::create()
#define REGISTER_SIM_OBJECT_WNS(NAME_SPACE, CLASS_NAME, OBJ_CLASS) \
SimObjectBuilder * \
new##NAME_SPACEi##OBJ_CLASS##Builder(const std::string &iniSection) \
{ \
return new NAME_SPACE##OBJ_CLASS##Builder(iniSection); \
} \
\
SimObjectClass the##NAME_SPACE##OBJ_CLASS##Class(CLASS_NAME, \
new##NAME_SPACE##OBJ_CLASS##Builder); \
\
/* see param.hh */ \
DEFINE_SIM_OBJECT_CLASS_NAME(CLASS_NAME, NAME_SPACE##OBJ_CLASS)
#endif // __BUILDER_HH__

View file

@ -141,7 +141,7 @@ class System : public SimObject
* up in the specified symbol table.
*/
template <class T>
T *System::addFuncEvent(SymbolTable *symtab, const char *lbl)
T *addFuncEvent(SymbolTable *symtab, const char *lbl)
{
Addr addr = 0; // initialize only to avoid compiler warning
@ -155,7 +155,7 @@ class System : public SimObject
/** Add a function-based event to kernel code. */
template <class T>
T *System::addKernelFuncEvent(const char *lbl)
T *addKernelFuncEvent(const char *lbl)
{
return addFuncEvent<T>(kernelSymtab, lbl);
}