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arm: Correctly display disassembly of vldmia/vstmia

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The MicroMemOp class generates the disassembly for both integer
and floating point instructions, but it would always print its
first operand as an integer register without considering that the
op may be a floating instruction in which case a float register
should be displayed instead.
This commit is contained in:
Curtis Dunham 2014-04-23 05:18:30 -04:00
parent 564cc801c6
commit ecf774bc56
1 changed files with 4 additions and 1 deletions
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3
src/arch/arm/insts/macromem.cc
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@ -1483,6 +1483,9 @@ MicroMemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
std::stringstream ss; std::stringstream ss;
printMnemonic(ss); printMnemonic(ss);
if (isFloating())
printReg(ss, ura + FP_Reg_Base);
else
printReg(ss, ura); printReg(ss, ura);
ss << ", ["; ss << ", [";
printReg(ss, urb); printReg(ss, urb);