sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

arm: Correctly display disassembly of vldmia/vstmia

Browse source 
The MicroMemOp class generates the disassembly for both integer
and floating point instructions, but it would always print its
first operand as an integer register without considering that the
op may be a floating instruction in which case a float register
should be displayed instead.
This commit is contained in:
Curtis Dunham 2014-04-23 05:18:30 -04:00
parent 564cc801c6
commit ecf774bc56
1 changed files with 4 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/arch/arm/insts/macromem.cc
View file

@ -1483,7 +1483,10 @@ MicroMemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
std::stringstream ss;
printMnemonic(ss);
printReg(ss, ura);
if (isFloating())
printReg(ss, ura + FP_Reg_Base);
else
printReg(ss, ura);
ss << ", [";
printReg(ss, urb);
ss << ", ";