arm: cleanup ARM ISA definition
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// -*- mode:c++ -*-
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// Copyright (c) 2007-2008 The Florida State University
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Stephen Hines
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// Declarations for execute() methods.
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def template BasicExecDeclare {{
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Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
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}};
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// -*- mode:c++ -*-
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// -*- mode:c++ -*-
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// Copyright (c) 2010-2012 ARM Limited
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// Copyright (c) 2010-2014 ARM Limited
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// All rights reserved
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// All rights reserved
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//
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//
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// The license below extends only to copyright in the software and shall
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// The license below extends only to copyright in the software and shall
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@ -40,9 +40,6 @@
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//AArch64 instructions
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//AArch64 instructions
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##include "aarch64.isa"
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##include "aarch64.isa"
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//Basic forms of various templates
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##include "basic.isa"
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//Useful bits shared by memory instructions
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//Useful bits shared by memory instructions
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##include "mem.isa"
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##include "mem.isa"
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@ -1,6 +1,6 @@
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// -*- mode:c++ -*-
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// -*- mode:c++ -*-
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// Copyright (c) 2012 ARM Limited
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// Copyright (c) 2012, 2014 ARM Limited
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// All rights reserved
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// All rights reserved
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//
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//
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// The license below extends only to copyright in the software and shall
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// The license below extends only to copyright in the software and shall
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@ -51,20 +51,6 @@ def template AA64FpRegRegOpConstructor {{
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}
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}
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}};
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}};
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def template AA64FpRegRegOpConstructor {{
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inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
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IntRegIndex _dest, IntRegIndex _op1,
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VfpMicroMode mode)
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: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
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_dest, _op1, mode)
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{
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%(constructor)s;
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for (int x = 0; x < _numDestRegs; x++) {
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_srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
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}
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}
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}};
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def template AA64FpRegImmOpConstructor {{
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def template AA64FpRegImmOpConstructor {{
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inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
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inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
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IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode)
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IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode)
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