Pushing current state. Need to fix compilation problems, have moved the SCONS script to build memory objects first.

Some places I could have been using a forward decleration and that should be cleaned up as well.

SConscript:
    Changed to move new memory object compilation to the top.  See the errors right away.
    Will also need to update all other objects that included the old memory system to use the new one.  But not until we at least get the mem system compiling first.
mem/packet.hh:
    Adding includes and typedefs to fix compilation errors
mem/request.hh:
    Add definition for compilation issues

--HG--
extra : convert_revision : 34d9ae534a7a625445b981e81c7a1f856517cb04
This commit is contained in:
Ron Dreslinski 2006-02-07 17:33:03 -05:00
parent 4e36678028
commit eabb0cfc78
3 changed files with 15 additions and 50 deletions

View file

@ -44,6 +44,11 @@ Import('env')
# Base sources used by all configurations.
base_sources = Split('''
mem/memory.cc
mem/page_table.cc
mem/physical.cc
mem/proxy.cc
arch/alpha/decoder.cc
arch/alpha/alpha_o3_exec.cc
arch/alpha/fast_cpu_exec.cc
@ -126,56 +131,6 @@ base_sources = Split('''
encumbered/mem/functional/main.cc
mem/base_hier.cc
mem/base_mem.cc
mem/hier_params.cc
mem/mem_cmd.cc
mem/mem_debug.cc
mem/mem_req.cc
mem/memory_interface.cc
mem/page_table.cc
mem/bus/base_interface.cc
mem/bus/bus.cc
mem/bus/bus_bridge.cc
mem/bus/bus_bridge_master.cc
mem/bus/bus_bridge_slave.cc
mem/bus/bus_interface.cc
mem/bus/dma_bus_interface.cc
mem/bus/dma_interface.cc
mem/bus/master_interface.cc
mem/bus/slave_interface.cc
mem/cache/base_cache.cc
mem/cache/cache.cc
mem/cache/cache_builder.cc
mem/cache/coherence/coherence_protocol.cc
mem/cache/coherence/uni_coherence.cc
mem/cache/miss/blocking_buffer.cc
mem/cache/miss/miss_queue.cc
mem/cache/miss/mshr.cc
mem/cache/miss/mshr_queue.cc
mem/cache/prefetch/base_prefetcher.cc
mem/cache/prefetch/prefetcher.cc
mem/cache/prefetch/tagged_prefetcher.cc
mem/cache/tags/base_tags.cc
mem/cache/tags/cache_tags.cc
mem/cache/tags/fa_lru.cc
mem/cache/tags/iic.cc
mem/cache/tags/lru.cc
mem/cache/tags/repl/gen.cc
mem/cache/tags/repl/repl.cc
mem/cache/tags/split.cc
mem/cache/tags/split_lru.cc
mem/cache/tags/split_lifo.cc
mem/functional/functional.cc
mem/functional/physical.cc
mem/functional/proxy.cc
mem/timing/base_memory.cc
mem/timing/memory_builder.cc
mem/timing/simple_mem_bank.cc
mem/trace/itx_writer.cc
mem/trace/mem_trace_writer.cc
mem/trace/m5_writer.cc
python/pyconfig.cc
python/embedded_py.cc

View file

@ -35,6 +35,7 @@
#ifndef __MEM_PACKET_HH__
#define __MEM_PACKET_HH__
#include "mem/request.hh"
/** List of all commands associated with a packet. */
enum Command
@ -50,6 +51,11 @@ enum PacketResult
BadAddress
};
class SenderState{};
class Coherence{};
typedef PacketDataPtr *unit8_t;
/**
* A Packet is the structure to handle requests between two levels
* of the memory system. The Request is a global object that trancends
@ -112,4 +118,6 @@ struct Packet
short getDest() const { return dest; }
};
typedef PacketPtr *Packet;
#endif //__MEM_PACKET_HH

View file

@ -53,6 +53,8 @@ class Request
Addr copyDest;
};
typedef RequestPtr *Request;
class CpuRequest : public Request
{
/** The virtual address of the request. */