cpu: Move the branch predictor out of the BaseCPU

The branch predictor is guarded by having either the in-order or
out-of-order CPU as one of the available CPU models and therefore
should not be used in the BaseCPU. This patch moves the parameter to
the relevant CPU classes.
This commit is contained in:
Andreas Hansson 2013-09-04 13:22:56 -04:00
parent bb1d2f3957
commit ea40297018
3 changed files with 6 additions and 5 deletions

View file

@ -51,7 +51,6 @@ from Bus import CoherentBus
from InstTracer import InstTracer from InstTracer import InstTracer
from ExeTracer import ExeTracer from ExeTracer import ExeTracer
from MemObject import MemObject from MemObject import MemObject
from BranchPredictor import BranchPredictor
from ClockDomain import * from ClockDomain import *
default_tracer = ExeTracer() default_tracer = ExeTracer()
@ -210,8 +209,6 @@ class BaseCPU(MemObject):
dcache_port = MasterPort("Data Port") dcache_port = MasterPort("Data Port")
_cached_ports = ['icache_port', 'dcache_port'] _cached_ports = ['icache_port', 'dcache_port']
branchPred = Param.BranchPredictor(NULL, "Branch Predictor")
if buildEnv['TARGET_ISA'] in ['x86', 'arm']: if buildEnv['TARGET_ISA'] in ['x86', 'arm']:
_cached_ports += ["itb.walker.port", "dtb.walker.port"] _cached_ports += ["itb.walker.port", "dtb.walker.port"]

View file

@ -68,4 +68,6 @@ class InOrderCPU(BaseCPU):
div32Latency = Param.Cycles(1, "Latency for 32-bit Divide Operations") div32Latency = Param.Cycles(1, "Latency for 32-bit Divide Operations")
div32RepeatRate = Param.Cycles(1, "Repeat Rate for 32-bit Divide Operations") div32RepeatRate = Param.Cycles(1, "Repeat Rate for 32-bit Divide Operations")
branchPred = BranchPredictor(numThreads = Parent.numThreads) branchPred = Param.BranchPredictor(BranchPredictor(numThreads =
Parent.numThreads),
"Branch Predictor")

View file

@ -125,7 +125,9 @@ class DerivO3CPU(BaseCPU):
smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter") smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy") smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy")
branchPred = BranchPredictor(numThreads = Parent.numThreads) branchPred = Param.BranchPredictor(BranchPredictor(numThreads =
Parent.numThreads),
"Branch Predictor")
needsTSO = Param.Bool(buildEnv['TARGET_ISA'] == 'x86', needsTSO = Param.Bool(buildEnv['TARGET_ISA'] == 'x86',
"Enable TSO Memory model") "Enable TSO Memory model")