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fixup remote gdb support for sparc fs

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--HG--
extra : convert_revision : 5edf0ad492fe438d66bcf0ae469ef841cd71e157
This commit is contained in:
Ali Saidi 2007-02-15 15:24:08 -05:00
parent e3dcbc94f7
commit e8cd54e805
2 changed files with 30 additions and 15 deletions
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32
src/arch/sparc/remote_gdb.cc
View file

@ -138,7 +138,7 @@ using namespace std;
using namespace TheISA; using namespace TheISA;
RemoteGDB::RemoteGDB(System *_system, ThreadContext *c) RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
: BaseRemoteGDB(_system, c, NumGDBRegs) : BaseRemoteGDB(_system, c, NumGDBRegs), nextBkpt(0)
{} {}
/////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////
@ -165,10 +165,27 @@ RemoteGDB::getregs()
{ {
memset(gdbregs.regs, 0, gdbregs.size); memset(gdbregs.regs, 0, gdbregs.size);
gdbregs.regs[RegPc] = context->readPC(); if (context->readMiscRegWithEffect(MISCREG_PSTATE) &
gdbregs.regs[RegNpc] = context->readNextPC(); PSTATE::am)
panic("In 32bit mode\n");
gdbregs.regs[RegPc] = htobe(context->readPC());
gdbregs.regs[RegNpc] = htobe(context->readNextPC());
for(int x = RegG0; x <= RegI0 + 7; x++) for(int x = RegG0; x <= RegI0 + 7; x++)
gdbregs.regs[x] = context->readIntReg(x - RegG0); gdbregs.regs[x] = htobe(context->readIntReg(x - RegG0));
gdbregs.regs[RegFsr] = htobe(context->readMiscRegWithEffect(MISCREG_FSR));
gdbregs.regs[RegFprs] = htobe(context->readMiscRegWithEffect(MISCREG_FPRS));
gdbregs.regs[RegY] = htobe(context->readIntReg(NumIntArchRegs + 1));
gdbregs.regs[RegState] = htobe(
context->readMiscRegWithEffect(MISCREG_CWP) |
context->readMiscRegWithEffect(MISCREG_PSTATE) << 8 |
context->readMiscRegWithEffect(MISCREG_ASI) << 24 |
context->readIntReg(NumIntArchRegs + 2) << 32);
DPRINTF(GDBRead, "PC=%#x\n", gdbregs.regs[RegPc]);
//Floating point registers are left at 0 in netbsd //Floating point registers are left at 0 in netbsd
//All registers other than the pc, npc and int regs //All registers other than the pc, npc and int regs
//are ignored as well. //are ignored as well.
@ -193,12 +210,13 @@ RemoteGDB::setregs()
void void
RemoteGDB::clearSingleStep() RemoteGDB::clearSingleStep()
{ {
warn("SPARC single stepping not implemented, " if (nextBkpt)
"but clearSingleStep called\n"); clearTempBreakpoint(nextBkpt);
} }
void void
RemoteGDB::setSingleStep() RemoteGDB::setSingleStep()
{ {
panic("SPARC single stepping not implemented.\n"); nextBkpt = context->readNextPC();
setTempBreakpoint(nextBkpt);
} }

13
src/arch/sparc/remote_gdb.hh
View file

@ -50,14 +50,9 @@ namespace SparcISA
enum RegisterConstants enum RegisterConstants
{ {
RegG0 = 0, RegO0 = 8, RegL0 = 16, RegI0 = 24, RegG0 = 0, RegO0 = 8, RegL0 = 16, RegI0 = 24,
RegF0 = 32, RegF32 = 64, RegF0 = 32,
RegPc = 80, RegNpc, RegCcr, RegFsr, RegFprs, RegY, RegAsi, RegPc = 64, RegNpc, RegState, RegFsr, RegFprs, RegY,
RegVer, RegTick, RegPil, RegPstate, /*RegState contains data in same format as tstate */
RegTstate, RegTba, RegTl, RegTt, RegTpc, RegTnpc, RegWstate,
RegCwp, RegCansave, RegCanrestore, RegCleanwin, RegOtherwin,
RegAsr16 = 103,
RegIcc = 119, RegXcc,
RegFcc0 = 121,
NumGDBRegs NumGDBRegs
}; };
@ -72,6 +67,8 @@ namespace SparcISA
void clearSingleStep(); void clearSingleStep();
void setSingleStep(); void setSingleStep();
Addr nextBkpt;
}; };
} }