X86: Pass whether an access was a read/write/fetch so faults can behave accordingly.

This commit is contained in:
Gabe Black 2009-02-23 00:20:34 -08:00
parent 6c5afe6346
commit e8c1c3e72e
6 changed files with 21 additions and 12 deletions

View file

@ -166,13 +166,13 @@ namespace X86ISA
void FakeITLBFault::invoke(ThreadContext * tc) void FakeITLBFault::invoke(ThreadContext * tc)
{ {
// Start the page table walker. // Start the page table walker.
tc->getITBPtr()->walk(tc, vaddr); tc->getITBPtr()->walk(tc, vaddr, write, execute);
} }
void FakeDTLBFault::invoke(ThreadContext * tc) void FakeDTLBFault::invoke(ThreadContext * tc)
{ {
// Start the page table walker. // Start the page table walker.
tc->getDTBPtr()->walk(tc, vaddr); tc->getDTBPtr()->walk(tc, vaddr, write, execute);
} }
#else // !FULL_SYSTEM #else // !FULL_SYSTEM

View file

@ -429,10 +429,12 @@ namespace X86ISA
{ {
protected: protected:
Addr vaddr; Addr vaddr;
bool write;
bool execute;
public: public:
FakeITLBFault(Addr _vaddr) : FakeITLBFault(Addr _vaddr, bool _write, bool _execute) :
X86Fault("fake instruction tlb fault", "itlb", 0), X86Fault("fake instruction tlb fault", "itlb", 0),
vaddr(_vaddr) vaddr(_vaddr), write(_write), execute(_execute)
{} {}
void invoke(ThreadContext * tc); void invoke(ThreadContext * tc);
@ -442,10 +444,12 @@ namespace X86ISA
{ {
protected: protected:
Addr vaddr; Addr vaddr;
bool write;
bool execute;
public: public:
FakeDTLBFault(Addr _vaddr) : FakeDTLBFault(Addr _vaddr, bool _write, bool _execute) :
X86Fault("fake data tlb fault", "dtlb", 0), X86Fault("fake data tlb fault", "dtlb", 0),
vaddr(_vaddr) vaddr(_vaddr), write(_write), execute(_execute)
{} {}
void invoke(ThreadContext * tc); void invoke(ThreadContext * tc);

View file

@ -319,11 +319,13 @@ Walker::doNext(PacketPtr &read, PacketPtr &write)
} }
void void
Walker::start(ThreadContext * _tc, Addr vaddr) Walker::start(ThreadContext * _tc, Addr vaddr, bool _write, bool _execute)
{ {
assert(state == Ready); assert(state == Ready);
assert(!tc); assert(!tc);
tc = _tc; tc = _tc;
execute = _execute;
write = _write;
VAddr addr = vaddr; VAddr addr = vaddr;

View file

@ -95,7 +95,7 @@ namespace X86ISA
void doNext(PacketPtr &read, PacketPtr &write); void doNext(PacketPtr &read, PacketPtr &write);
// Kick off the state machine. // Kick off the state machine.
void start(ThreadContext * _tc, Addr vaddr); void start(ThreadContext * _tc, Addr vaddr, bool write, bool execute);
protected: protected:
@ -165,8 +165,11 @@ namespace X86ISA
State nextState; State nextState;
int size; int size;
bool enableNX; bool enableNX;
bool write, execute;
TlbEntry entry; TlbEntry entry;
Fault pageFault(bool present);
public: public:
void setTLB(TLB * _tlb) void setTLB(TLB * _tlb)

View file

@ -140,9 +140,9 @@ TLB::lookup(Addr va, bool update_lru)
#if FULL_SYSTEM #if FULL_SYSTEM
void void
TLB::walk(ThreadContext * _tc, Addr vaddr) TLB::walk(ThreadContext * _tc, Addr vaddr, bool write, bool execute)
{ {
walker->start(_tc, vaddr); walker->start(_tc, vaddr, write, execute);
} }
#endif #endif
@ -616,7 +616,7 @@ TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute)
// The vaddr already has the segment base applied. // The vaddr already has the segment base applied.
TlbEntry *entry = lookup(vaddr); TlbEntry *entry = lookup(vaddr);
if (!entry) { if (!entry) {
return new TlbFault(vaddr); return new TlbFault(vaddr, write, execute);
} else { } else {
// Do paging protection checks. // Do paging protection checks.
DPRINTF(TLB, "Entry found with paddr %#x, doing protection checks.\n", entry->paddr); DPRINTF(TLB, "Entry found with paddr %#x, doing protection checks.\n", entry->paddr);

View file

@ -119,7 +119,7 @@ namespace X86ISA
Walker * walker; Walker * walker;
void walk(ThreadContext * _tc, Addr vaddr); void walk(ThreadContext * _tc, Addr vaddr, bool write, bool execute);
#endif #endif
public: public: