inorder: don't stall after stores
once a ST is sent off, it's OK to keep processing, however it's a little more complicated to handle the packet acknowledging the store is completed
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@ -240,17 +240,17 @@ CacheUnit::removeAddrDependency(DynInstPtr inst)
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inst->unsetMemAddr();
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// Erase from Address List
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vector<Addr>::iterator vect_it = find(addrList[tid].begin(),
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std::list<Addr>::iterator list_it = find(addrList[tid].begin(),
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addrList[tid].end(),
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mem_addr);
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assert(vect_it != addrList[tid].end() || inst->splitInst);
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assert(list_it != addrList[tid].end() || inst->splitInst);
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if (vect_it != addrList[tid].end()) {
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if (list_it != addrList[tid].end()) {
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DPRINTF(AddrDep,
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"[tid:%i]: [sn:%i] Address %08p removed from dependency "
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"list\n", inst->readTid(), inst->seqNum, (*vect_it));
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"list\n", inst->readTid(), inst->seqNum, (*list_it));
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addrList[tid].erase(vect_it);
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addrList[tid].erase(list_it);
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// Erase From Address Map (Used for Debugging)
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addrMap[tid].erase(addrMap[tid].find(mem_addr));
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@ -187,9 +187,9 @@ class CacheUnit : public Resource
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bool cachePortBlocked;
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std::vector<Addr> addrList[ThePipeline::MaxThreads];
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std::list<Addr> addrList[ThePipeline::MaxThreads];
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std::map<Addr, InstSeqNum> addrMap[ThePipeline::MaxThreads];
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m5::hash_map<Addr, InstSeqNum> addrMap[ThePipeline::MaxThreads];
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public:
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int cacheBlkSize;
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