Serialization changes to make O3CPU consistent with the other models.
src/cpu/o3/commit_impl.hh: Always set instruction. This is necessary for serialization as the instruction is also serialized. src/cpu/o3/cpu.cc: Change serialization so it matches other CPU's output. Also fix up some indexing. --HG-- extra : convert_revision : 52f6e183132d177bed6e29dd7cf0c10aed6d8534
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2 changed files with 16 additions and 11 deletions
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@ -996,6 +996,12 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
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// Check if the instruction caused a fault. If so, trap.
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Fault inst_fault = head_inst->getFault();
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// DTB will sometimes need the machine instruction for when
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// faults happen. So we will set it here, prior to the DTB
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// possibly needing it for its fault.
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thread[tid]->setInst(
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static_cast<TheISA::MachInst>(head_inst->staticInst->machInst));
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if (inst_fault != NoFault) {
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head_inst->setCompleted();
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DPRINTF(Commit, "Inst [sn:%lli] PC %#x has a fault\n",
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@ -1018,12 +1024,6 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
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// execution doesn't generate extra squashes.
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thread[tid]->inSyscall = true;
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// DTB will sometimes need the machine instruction for when
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// faults happen. So we will set it here, prior to the DTB
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// possibly needing it for its fault.
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thread[tid]->setInst(
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static_cast<TheISA::MachInst>(head_inst->staticInst->machInst));
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// Execute the trap. Although it's slightly unrealistic in
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// terms of timing (as it doesn't wait for the full timing of
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// the trap event to complete before updating state), it's
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@ -765,7 +765,8 @@ template <class Impl>
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void
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FullO3CPU<Impl>::serialize(std::ostream &os)
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{
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SERIALIZE_ENUM(_status);
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SimObject::State so_state = SimObject::getState();
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SERIALIZE_ENUM(so_state);
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BaseCPU::serialize(os);
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nameOut(os, csprintf("%s.tickEvent", name()));
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tickEvent.serialize(os);
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@ -786,7 +787,8 @@ template <class Impl>
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void
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FullO3CPU<Impl>::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_ENUM(_status);
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SimObject::State so_state;
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UNSERIALIZE_ENUM(so_state);
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BaseCPU::unserialize(cp, section);
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tickEvent.unserialize(cp, csprintf("%s.tickEvent", section));
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@ -1063,7 +1065,8 @@ template <class Impl>
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void
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FullO3CPU<Impl>::setArchFloatRegSingle(int reg_idx, float val, unsigned tid)
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{
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PhysRegIndex phys_reg = commitRenameMap[tid].lookup(reg_idx);
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int idx = reg_idx + TheISA::FP_Base_DepTag;
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PhysRegIndex phys_reg = commitRenameMap[tid].lookup(idx);
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regFile.setFloatReg(phys_reg, val);
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}
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@ -1072,7 +1075,8 @@ template <class Impl>
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void
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FullO3CPU<Impl>::setArchFloatRegDouble(int reg_idx, double val, unsigned tid)
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{
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PhysRegIndex phys_reg = commitRenameMap[tid].lookup(reg_idx);
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int idx = reg_idx + TheISA::FP_Base_DepTag;
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PhysRegIndex phys_reg = commitRenameMap[tid].lookup(idx);
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regFile.setFloatReg(phys_reg, val, 64);
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}
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@ -1081,7 +1085,8 @@ template <class Impl>
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void
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FullO3CPU<Impl>::setArchFloatRegInt(int reg_idx, uint64_t val, unsigned tid)
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{
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PhysRegIndex phys_reg = commitRenameMap[tid].lookup(reg_idx);
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int idx = reg_idx + TheISA::FP_Base_DepTag;
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PhysRegIndex phys_reg = commitRenameMap[tid].lookup(idx);
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regFile.setFloatRegBits(phys_reg, val);
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}
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