Add missing TSUNAMI ipi code.
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@ -313,17 +313,34 @@ EXPORT(sys_wripir)
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and r16, MAXPROC, r14 // mask the top stuff: MAXPROC+1 CPUs supported
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bis r31, 0x1, r16 // get a one
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sll r16, r14, r14 // shift the bit to the right place
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#if defined(TSUNAMI) || defined(BIG_TSUNAMI)
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sll r14,IPIQ_shift,r14
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#endif
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//
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// Build the Broadcast Space base address
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//
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#if defined(TSUNAMI) || defined(BIG_TSUNAMI)
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lda r16,0xf01(r31)
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sll r16,32,r16
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ldah r13,0xa0(r31)
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sll r13,8,r13
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bis r16,r13,r16
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lda r16,IPIQ_addr(r16)
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#elif defined(TLASER)
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lda r13, 0xff8e(r31) // Load the upper address bits
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sll r13, 24, r13 // shift them to the top
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#endif
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//
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// Send out the IP Intr
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//
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#if defined(TSUNAMI) || defined(BIG_TSUNAMI)
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stq_p r14, 0(r16) // Tsunami MISC Register
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#elif defined(TLASER)
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stq_p r14, 0x40(r13) // Write to TLIPINTR reg
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#endif
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wmb // Push out the store
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hw_rei
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