From e5c1488cb60395177d981d36b01d23c7fa033135 Mon Sep 17 00:00:00 2001 From: Ricardo Alves Date: Thu, 15 Sep 2016 18:21:24 +0100 Subject: [PATCH] arm: Add m5_fail support for aarch64 Change-Id: Id2acbc09772be310a0eb9e33295afab07e08a4fa Reviewed-by: Andreas Sandberg --- src/arch/arm/isa/formats/aarch64.isa | 1 + src/arch/arm/isa/insts/m5ops.isa | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/src/arch/arm/isa/formats/aarch64.isa b/src/arch/arm/isa/formats/aarch64.isa index c3fa74274..1252cdf25 100644 --- a/src/arch/arm/isa/formats/aarch64.isa +++ b/src/arch/arm/isa/formats/aarch64.isa @@ -2013,6 +2013,7 @@ namespace Aarch64 case 0x11: return new Deprecated_ivle(machInst); case 0x20: return new Deprecated_exit (machInst); case 0x21: return new M5exit64(machInst); + case 0x22: return new M5fail64(machInst); case 0x31: return new Loadsymbol(machInst); case 0x30: return new Initparam64(machInst); case 0x40: return new Resetstats64(machInst); diff --git a/src/arch/arm/isa/insts/m5ops.isa b/src/arch/arm/isa/insts/m5ops.isa index efe88c73a..e93147859 100644 --- a/src/arch/arm/isa/insts/m5ops.isa +++ b/src/arch/arm/isa/insts/m5ops.isa @@ -247,6 +247,11 @@ let {{ m5fail_code = ''' PseudoInst::m5fail(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2)); ''' + + m5fail_code64 = ''' + PseudoInst::m5fail(xc->tcBase(), X0, X1); + ''' + m5failIop = InstObjParams("m5fail", "M5fail", "PredOp", { "code": m5fail_code, "predicate_test": predicateTest }, @@ -255,6 +260,15 @@ let {{ decoder_output += BasicConstructor.subst(m5failIop) exec_output += PredOpExecute.subst(m5failIop) + m5failIop = InstObjParams("m5fail", "M5fail64", "PredOp", + { "code": m5fail_code64, + "predicate_test": predicateTest }, + ["No_OpClass", "IsNonSpeculative"]) + header_output += BasicDeclare.subst(m5failIop) + decoder_output += BasicConstructor.subst(m5failIop) + exec_output += PredOpExecute.subst(m5failIop) + + m5exitIop = InstObjParams("m5exit", "M5exit64", "PredOp", { "code": m5exit_code64, "predicate_test": predicateTest },