arm: implement the CONTEXTIDR_EL2 system reg.
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2 changed files with 14 additions and 8 deletions
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@ -1334,6 +1334,8 @@ bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS] = {
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bitset<NUM_MISCREG_INFOS>(string("11111111110000000100")),
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bitset<NUM_MISCREG_INFOS>(string("11111111110000000100")),
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// MISCREG_CBAR_EL1
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// MISCREG_CBAR_EL1
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bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
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bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
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// MISCREG_CONTEXTIDR_EL2
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bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
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// Dummy registers
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// Dummy registers
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// MISCREG_NOP
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// MISCREG_NOP
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@ -3343,6 +3345,8 @@ decodeAArch64SysReg(unsigned op0, unsigned op1,
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switch (crm) {
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switch (crm) {
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case 0:
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case 0:
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switch (op2) {
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switch (op2) {
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case 1:
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return MISCREG_CONTEXTIDR_EL2;
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case 2:
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case 2:
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return MISCREG_TPIDR_EL2;
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return MISCREG_TPIDR_EL2;
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}
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}
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2010-2014 ARM Limited
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* Copyright (c) 2010-2015 ARM Limited
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* All rights reserved
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* All rights reserved
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*
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*
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* The license below extends only to copyright in the software and shall
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* The license below extends only to copyright in the software and shall
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@ -663,16 +663,17 @@ namespace ArmISA
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MISCREG_CPUMERRSR_EL1, // 596
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MISCREG_CPUMERRSR_EL1, // 596
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MISCREG_L2MERRSR_EL1, // 597
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MISCREG_L2MERRSR_EL1, // 597
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MISCREG_CBAR_EL1, // 598
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MISCREG_CBAR_EL1, // 598
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MISCREG_CONTEXTIDR_EL2, // 599
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// Dummy registers
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// Dummy registers
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MISCREG_NOP, // 599
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MISCREG_NOP, // 600
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MISCREG_RAZ, // 600
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MISCREG_RAZ, // 601
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MISCREG_CP14_UNIMPL, // 601
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MISCREG_CP14_UNIMPL, // 602
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MISCREG_CP15_UNIMPL, // 602
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MISCREG_CP15_UNIMPL, // 603
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MISCREG_A64_UNIMPL, // 603
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MISCREG_A64_UNIMPL, // 604
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MISCREG_UNKNOWN, // 604
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MISCREG_UNKNOWN, // 605
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NUM_MISCREGS // 605
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NUM_MISCREGS // 606
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};
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};
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enum MiscRegInfo {
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enum MiscRegInfo {
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@ -1344,6 +1345,7 @@ namespace ArmISA
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"cpumerrsr_el1",
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"cpumerrsr_el1",
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"l2merrsr_el1",
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"l2merrsr_el1",
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"cbar_el1",
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"cbar_el1",
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"contextidr_el2",
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// Dummy registers
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// Dummy registers
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"nop",
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"nop",
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