diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript
index e019b77c9..c1a1b9ba3 100644
--- a/src/arch/x86/SConscript
+++ b/src/arch/x86/SConscript
@@ -109,6 +109,8 @@ if env['TARGET_ISA'] == 'x86':
     TraceFlag('X86')
 
     if env['FULL_SYSTEM']:
+        TraceFlag('LocalApic')
+
         SimObject('X86LocalApic.py')
         SimObject('X86System.py')
 
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index 5814859b3..6f1920de0 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -215,6 +215,9 @@ X86ISA::Interrupts::read(PacketPtr pkt)
         panic("Accessed more than one register at a time in the APIC!\n");
     ApicRegIndex reg = decodeAddr(offset);
     uint32_t val = htog(readReg(reg));
+    DPRINTF(LocalApic,
+            "Reading Local APIC register %d at offset %#x as %#x.\n",
+            reg, offset, val);
     pkt->setData(((uint8_t *)&val) + (offset & mask(3)));
     return latency;
 }
@@ -229,6 +232,9 @@ X86ISA::Interrupts::write(PacketPtr pkt)
     ApicRegIndex reg = decodeAddr(offset);
     uint32_t val = regs[reg];
     pkt->writeData(((uint8_t *)&val) + (offset & mask(3)));
+    DPRINTF(LocalApic,
+            "Writing Local APIC register %d at offset %#x as %#x.\n",
+            reg, offset, gtoh(val));
     setReg(reg, gtoh(val));
     return latency;
 }