isa_parser: Get rid of the now unused ControlBitfieldOperand.
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@ -1431,32 +1431,6 @@ class ControlRegOperand(Operand):
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self.base_name
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self.base_name
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return wb
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return wb
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class ControlBitfieldOperand(ControlRegOperand):
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def makeRead(self):
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bit_select = 0
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if (self.ctype == 'float' or self.ctype == 'double'):
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error(0, 'Attempt to read control register as FP')
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if self.read_code != None:
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return self.buildReadCode('readMiscReg')
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base = 'xc->readMiscReg(%s)' % self.reg_spec
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name = self.base_name
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return '%s = bits(%s, %s_HI, %s_LO);' % \
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(name, base, name, name)
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def makeWrite(self):
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if (self.ctype == 'float' or self.ctype == 'double'):
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error(0, 'Attempt to write control register as FP')
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if self.write_code != None:
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return self.buildWriteCode('setMiscReg')
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base = 'xc->readMiscReg(%s)' % self.reg_spec
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name = self.base_name
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wb_val = 'insertBits(%s, %s_HI, %s_LO, %s)' % \
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(base, name, name, self.base_name)
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wb = 'xc->setMiscRegOperand(this, %s, %s );\n' % (self.dest_reg_idx, wb_val)
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wb += 'if (traceData) { traceData->setData(%s); }' % \
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self.base_name
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return wb
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class MemOperand(Operand):
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class MemOperand(Operand):
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def isMem(self):
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def isMem(self):
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return 1
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return 1
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