ARM: Add a base class for SRS.
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3 changed files with 109 additions and 0 deletions
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@ -87,6 +87,61 @@ RfeOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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return ss.str();
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}
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string
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SrsOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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stringstream ss;
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switch (mode) {
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case DecrementAfter:
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printMnemonic(ss, "da");
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break;
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case DecrementBefore:
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printMnemonic(ss, "db");
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break;
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case IncrementAfter:
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printMnemonic(ss, "ia");
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break;
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case IncrementBefore:
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printMnemonic(ss, "ib");
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break;
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}
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printReg(ss, INTREG_SP);
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if (wb) {
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ss << "!";
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}
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ss << ", #";
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switch (mode) {
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case MODE_USER:
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ss << "user";
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break;
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case MODE_FIQ:
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ss << "fiq";
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break;
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case MODE_IRQ:
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ss << "irq";
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break;
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case MODE_SVC:
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ss << "supervisor";
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break;
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case MODE_MON:
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ss << "monitor";
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break;
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case MODE_ABORT:
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ss << "abort";
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break;
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case MODE_UNDEFINED:
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ss << "undefined";
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break;
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case MODE_SYSTEM:
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ss << "system";
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break;
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default:
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ss << "unrecognized";
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break;
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}
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return ss.str();
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}
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void
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Memory::printInst(std::ostream &os, AddrMode addrMode) const
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{
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@ -87,6 +87,30 @@ class RfeOp : public PredOp
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std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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// The address is a base register plus an immediate.
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class SrsOp : public PredOp
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{
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public:
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enum AddrMode {
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DecrementAfter,
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DecrementBefore,
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IncrementAfter,
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IncrementBefore
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};
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protected:
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uint32_t regMode;
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AddrMode mode;
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bool wb;
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SrsOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
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uint32_t _regMode, AddrMode _mode, bool _wb)
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: PredOp(mnem, _machInst, __opClass),
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regMode(_regMode), mode(_mode), wb(_wb)
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{}
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std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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class Memory : public PredOp
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{
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public:
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@ -409,6 +409,26 @@ def template RfeDeclare {{
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};
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}};
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def template SrsDeclare {{
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/**
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* Static instruction class for "%(mnemonic)s".
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*/
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class %(class_name)s : public %(base_class)s
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{
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public:
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/// Constructor.
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%(class_name)s(ExtMachInst machInst,
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uint32_t _regMode, int _mode, bool _wb);
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%(BasicExecDeclare)s
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%(InitiateAccDeclare)s
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%(CompleteAccDeclare)s
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};
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}};
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def template SwapDeclare {{
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/**
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* Static instruction class for "%(mnemonic)s".
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@ -575,6 +595,16 @@ def template RfeConstructor {{
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}
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}};
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def template SrsConstructor {{
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inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
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uint32_t _regMode, int _mode, bool _wb)
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: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
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(OperatingMode)_regMode, (AddrMode)_mode, _wb)
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{
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%(constructor)s;
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}
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}};
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def template SwapConstructor {{
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inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
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uint32_t _dest, uint32_t _op1, uint32_t _base)
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