inorder: treat SE mode syscalls as a trapping instruction
define a syscallContext to schedule the syscall and then use syscall() to actually perform the action
This commit is contained in:
parent
c95fe261ab
commit
db8b1e4b78
5 changed files with 40 additions and 17 deletions
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@ -105,7 +105,7 @@ std::string InOrderCPU::eventNames[NumCPUEvents] =
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"HaltThread",
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"SuspendThread",
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"Trap",
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"InstGraduated",
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"Syscall",
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"SquashFromMemStall",
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"UpdatePCs"
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};
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@ -151,6 +151,11 @@ InOrderCPU::CPUEvent::process()
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cpu->resPool->trap(fault, tid, inst);
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break;
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case Syscall:
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cpu->syscall(inst->syscallNum, tid);
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cpu->resPool->trap(fault, tid, inst);
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break;
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default:
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fatal("Unrecognized Event Type %s", eventNames[cpuEventType]);
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}
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@ -1068,9 +1073,6 @@ InOrderCPU::activateNextReadyContext(int delay)
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{
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DPRINTF(InOrderCPU,"Activating next ready thread\n");
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// NOTE: Add 5 to the event priority so that we always activate
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// threads after we've finished deactivating, squashing,etc.
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// other threads
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scheduleCpuEvent(ActivateNextReadyThread, NoFault, 0/*tid*/, dummyInst[0],
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delay, ActivateNextReadyThread_Pri);
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@ -1382,11 +1384,6 @@ InOrderCPU::instDone(DynInstPtr inst, ThreadID tid)
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// Check for instruction-count-based events.
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comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
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// Broadcast to other resources an instruction
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// has been completed
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resPool->scheduleEvent((CPUEventType)ResourcePool::InstGraduated, inst,
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0, 0, tid);
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// Finally, remove instruction from CPU
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removeInst(inst);
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}
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@ -1600,6 +1597,12 @@ InOrderCPU::wakeup()
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#endif
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#if !FULL_SYSTEM
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void
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InOrderCPU::syscallContext(Fault fault, ThreadID tid, DynInstPtr inst, int delay)
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{
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scheduleCpuEvent(Syscall, fault, tid, inst, delay, Syscall_Pri);
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}
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void
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InOrderCPU::syscall(int64_t callnum, ThreadID tid)
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{
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@ -182,7 +182,7 @@ class InOrderCPU : public BaseCPU
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HaltThread,
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SuspendThread,
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Trap,
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InstGraduated,
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Syscall,
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SquashFromMemStall,
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UpdatePCs,
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NumCPUEvents
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@ -192,6 +192,7 @@ class InOrderCPU : public BaseCPU
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enum CPUEventPri {
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InOrderCPU_Pri = Event::CPU_Tick_Pri,
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Syscall_Pri = Event::CPU_Tick_Pri + 9,
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ActivateNextReadyThread_Pri = Event::CPU_Tick_Pri + 10
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};
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@ -207,6 +208,7 @@ class InOrderCPU : public BaseCPU
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DynInstPtr inst;
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Fault fault;
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unsigned vpe;
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short syscall_num;
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public:
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/** Constructs a CPU event. */
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@ -436,6 +438,13 @@ class InOrderCPU : public BaseCPU
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/** Check if this address is a valid data address. */
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bool validDataAddr(Addr addr) { return true; }
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#else
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/** Schedule a syscall on the CPU */
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void syscallContext(Fault fault, ThreadID tid, DynInstPtr inst,
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int delay = 0);
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/** Executes a syscall.*/
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void syscall(int64_t callnum, ThreadID tid);
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#endif
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/** Schedule a trap on the CPU */
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@ -650,9 +659,6 @@ class InOrderCPU : public BaseCPU
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Fault write(DynInstPtr inst, uint8_t *data, unsigned size,
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Addr addr, unsigned flags, uint64_t *write_res = NULL);
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/** Executes a syscall.*/
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void syscall(int64_t callnum, ThreadID tid);
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public:
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/** Per-Thread List of all the instructions in flight. */
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std::list<DynInstPtr> instList[ThePipeline::MaxThreads];
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@ -296,7 +296,8 @@ InOrderDynInst::simPalCheck(int palFunc)
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void
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InOrderDynInst::syscall(int64_t callnum)
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{
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cpu->syscall(callnum, this->threadNumber);
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syscallNum = callnum;
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cpu->syscallContext(NoFault, this->threadNumber, this);
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}
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#endif
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@ -385,6 +385,9 @@ class InOrderDynInst : public FastAlloc, public RefCounted
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bool isQuiesce() const { return staticInst->isQuiesce(); }
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bool isIprAccess() const { return staticInst->isIprAccess(); }
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bool isUnverifiable() const { return staticInst->isUnverifiable(); }
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bool isSyscall() const
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{ return staticInst->isSyscall(); }
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/////////////////////////////////////////////
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//
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@ -509,6 +512,8 @@ class InOrderDynInst : public FastAlloc, public RefCounted
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void trap(Fault fault);
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bool simPalCheck(int palFunc);
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#else
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short syscallNum;
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/** Calls a syscall. */
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void syscall(int64_t callnum);
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#endif
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@ -89,6 +89,8 @@ ExecutionUnit::execute(int slot_num)
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DynInstPtr inst = reqs[slot_num]->inst;
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Fault fault = NoFault;
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Tick cur_tick = curTick();
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unsigned stage_num = exec_req->getStageNum();
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ThreadID tid = inst->readTid();
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#if TRACING_ON
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InstSeqNum seq_num = inst->seqNum;
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#endif
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@ -149,13 +151,10 @@ ExecutionUnit::execute(int slot_num)
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assert(inst->isControl());
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// Set up Squash Generated By this Misprediction
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unsigned stage_num = exec_req->getStageNum();
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ThreadID tid = inst->readTid();
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TheISA::PCState pc = inst->pcState();
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TheISA::advancePC(pc, inst->staticInst);
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inst->setPredTarg(pc);
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inst->setSquashInfo(stage_num);
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setupSquash(inst, stage_num, tid);
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DPRINTF(InOrderExecute, "[tid:%i]: [sn:%i] Squashing from "
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@ -210,6 +209,15 @@ ExecutionUnit::execute(int slot_num)
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seq_num,
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(inst->resultType(0) == InOrderDynInst::Float) ?
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inst->readFloatResult(0) : inst->readIntResult(0));
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#if !FULL_SYSTEM
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// The Syscall might change the PC, so conservatively
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// squash everything behing it
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if (inst->isSyscall()) {
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inst->setSquashInfo(stage_num);
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setupSquash(inst, stage_num, tid);
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}
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#endif
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} else {
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DPRINTF(InOrderExecute, "[tid:%i]: [sn:%i]: had a %s "
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"fault.\n", inst->readTid(), seq_num, fault->name());
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