arm: make the bi-mode predictor the default for O3_ARM_v7a_BP
the branch predictor used in the Cortex-A15 is a bi-mode style predictor, see: http://arm.com/files/pdf/at-exploring_the_design_of_the_cortex-a15.pdf and http://nvidia.com/docs/IO/116757/NVIDIA_Quad_a15_whitepaper_FINALv2.pdf this patch makes the bi-mode predictor the default for the ARM O3 CPU.
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@ -42,7 +42,7 @@ class O3_ARM_v7a_Complex_Int(FUDesc):
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count = 1
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count = 1
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# Floating point and SIMD instructions
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# Floating point and SIMD instructions
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class O3_ARM_v7a_FP(FUDesc):
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class O3_ARM_v7a_FP(FUDesc):
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opList = [ OpDesc(opClass='SimdAdd', opLat=4),
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opList = [ OpDesc(opClass='SimdAdd', opLat=4),
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OpDesc(opClass='SimdAddAcc', opLat=4),
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OpDesc(opClass='SimdAddAcc', opLat=4),
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@ -87,12 +87,9 @@ class O3_ARM_v7a_FUP(FUPool):
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FUList = [O3_ARM_v7a_Simple_Int(), O3_ARM_v7a_Complex_Int(),
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FUList = [O3_ARM_v7a_Simple_Int(), O3_ARM_v7a_Complex_Int(),
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O3_ARM_v7a_Load(), O3_ARM_v7a_Store(), O3_ARM_v7a_FP()]
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O3_ARM_v7a_Load(), O3_ARM_v7a_Store(), O3_ARM_v7a_FP()]
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# Tournament Branch Predictor
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# Bi-Mode Branch Predictor
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class O3_ARM_v7a_BP(BranchPredictor):
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class O3_ARM_v7a_BP(BranchPredictor):
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predType = "tournament"
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predType = "bi-mode"
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localPredictorSize = 2048
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localCtrBits = 2
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localHistoryTableSize = 1024
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globalPredictorSize = 8192
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globalPredictorSize = 8192
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globalCtrBits = 2
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globalCtrBits = 2
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choicePredictorSize = 8192
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choicePredictorSize = 8192
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@ -167,7 +164,7 @@ class O3_ARM_v7a_DCache(BaseCache):
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write_buffers = 16
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write_buffers = 16
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is_top_level = 'true'
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is_top_level = 'true'
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# TLB Cache
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# TLB Cache
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# Use a cache as a L2 TLB
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# Use a cache as a L2 TLB
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class O3_ARM_v7aWalkCache(BaseCache):
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class O3_ARM_v7aWalkCache(BaseCache):
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hit_latency = 4
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hit_latency = 4
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