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Add Trap Level Zero to interrupts, remove some unreachable code that I forgot to remove last time.

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--HG--
extra : convert_revision : 74c4c4591be5a66c21077a6fc5f3f60b0ee9bcc1
This commit is contained in:
Lisa Hsu 2007-01-11 09:18:31 -05:00
parent 0d7282d7ab
commit d939060ec6
1 changed files with 1 additions and 20 deletions
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21
src/arch/sparc/interrupts.hh
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@ -24,8 +24,6 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Gabe Black
*/
#ifndef __ARCH_SPARC_INTERRUPT_HH__
@ -124,11 +122,10 @@ enum interrupts_t {
} else {
if (interrupts[trap_level_zero]) {
//HAVEN'T IMPLed YET
if ((pstate & HPSTATE::tlz) && (tc->readMiscReg(MISCREG_TL) == 0)) {
interrupts[trap_level_zero] = false;
--numPosted;
return NoFault;
return new TrapLevelZero;
}
}
if (interrupts[hstick_match]) {
@ -181,22 +178,6 @@ enum interrupts_t {
}
}
return NoFault;
// conditioning the softint interrups
if (tc->readMiscReg(MISCREG_HPSTATE) & HPSTATE::hpriv) {
// if running in privileged mode, then pend the interrupt
return NoFault;
} else {
int int_level = InterruptLevel(tc->readMiscReg(MISCREG_SOFTINT));
if ((int_level <= tc->readMiscReg(MISCREG_PIL)) ||
!(tc->readMiscReg(MISCREG_PSTATE) & PSTATE::ie)) {
// if PIL or no interrupt enabled, then pend the interrupt
return NoFault;
} else {
return new InterruptLevelN(int_level);
}
}
}
void updateIntrInfo(ThreadContext * tc)