Rename quiesce to drain to avoid confusion with the pseudo instruction.

src/cpu/simple/timing.cc:
src/cpu/simple/timing.hh:
src/python/m5/__init__.py:
src/python/m5/config.py:
src/sim/main.cc:
src/sim/sim_events.cc:
src/sim/sim_events.hh:
src/sim/sim_object.cc:
src/sim/sim_object.hh:
    Rename quiesce to drain.

--HG--
extra : convert_revision : fc3244a3934812e1edb8050f1f51f30382baf774
This commit is contained in:
Kevin Lim 2006-07-05 17:59:33 -04:00
parent bd26dbdb13
commit d8fd09cc15
9 changed files with 61 additions and 63 deletions

View file

@ -88,7 +88,7 @@ TimingSimpleCPU::TimingSimpleCPU(Params *p)
{ {
_status = Idle; _status = Idle;
ifetch_pkt = dcache_pkt = NULL; ifetch_pkt = dcache_pkt = NULL;
quiesceEvent = NULL; drainEvent = NULL;
state = SimObject::Timing; state = SimObject::Timing;
} }
@ -112,18 +112,16 @@ TimingSimpleCPU::unserialize(Checkpoint *cp, const string &section)
} }
bool bool
TimingSimpleCPU::quiesce(Event *quiesce_event) TimingSimpleCPU::drain(Event *drain_event)
{ {
// TimingSimpleCPU is ready to quiesce if it's not waiting for // TimingSimpleCPU is ready to drain if it's not waiting for
// an access to complete. // an access to complete.
if (status() == Idle || status() == Running || status() == SwitchedOut) { if (status() == Idle || status() == Running || status() == SwitchedOut) {
DPRINTF(Config, "Ready to quiesce\n"); changeState(SimObject::DrainedTiming);
changeState(SimObject::QuiescedTiming);
return false; return false;
} else { } else {
DPRINTF(Config, "Waiting to quiesce\n"); changeState(SimObject::Draining);
changeState(SimObject::Quiescing); drainEvent = drain_event;
quiesceEvent = quiesce_event;
return true; return true;
} }
} }
@ -423,8 +421,8 @@ TimingSimpleCPU::completeIfetch(Packet *pkt)
delete pkt->req; delete pkt->req;
delete pkt; delete pkt;
if (getState() == SimObject::Quiescing) { if (getState() == SimObject::Draining) {
completeQuiesce(); completeDrain();
return; return;
} }
@ -480,8 +478,8 @@ TimingSimpleCPU::completeDataAccess(Packet *pkt)
assert(_status == DcacheWaitResponse); assert(_status == DcacheWaitResponse);
_status = Running; _status = Running;
if (getState() == SimObject::Quiescing) { if (getState() == SimObject::Draining) {
completeQuiesce(); completeDrain();
delete pkt->req; delete pkt->req;
delete pkt; delete pkt;
@ -500,11 +498,11 @@ TimingSimpleCPU::completeDataAccess(Packet *pkt)
void void
TimingSimpleCPU::completeQuiesce() TimingSimpleCPU::completeDrain()
{ {
DPRINTF(Config, "Done quiescing\n"); DPRINTF(Config, "Done draining\n");
changeState(SimObject::QuiescedTiming); changeState(SimObject::DrainedTiming);
quiesceEvent->process(); drainEvent->process();
} }
bool bool

View file

@ -64,7 +64,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
Status status() const { return _status; } Status status() const { return _status; }
Event *quiesceEvent; Event *drainEvent;
private: private:
@ -133,7 +133,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
virtual void serialize(std::ostream &os); virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section); virtual void unserialize(Checkpoint *cp, const std::string &section);
virtual bool quiesce(Event *quiesce_event); virtual bool drain(Event *drain_event);
virtual void resume(); virtual void resume();
virtual void setMemoryMode(State new_mode); virtual void setMemoryMode(State new_mode);
@ -154,7 +154,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
void completeDataAccess(Packet *); void completeDataAccess(Packet *);
void advanceInst(Fault fault); void advanceInst(Fault fault);
private: private:
void completeQuiesce(); void completeDrain();
}; };
#endif // __CPU_SIMPLE_TIMING_HH__ #endif // __CPU_SIMPLE_TIMING_HH__

View file

@ -213,14 +213,14 @@ atexit.register(cc_main.doExitCleanup)
# matter since most scripts will probably 'from m5.objects import *'. # matter since most scripts will probably 'from m5.objects import *'.
import objects import objects
def doQuiesce(root): def doDrain(root):
quiesce = cc_main.createCountedQuiesce() drain_event = cc_main.createCountedDrain()
unready_objects = root.startQuiesce(quiesce, True) unready_objects = root.startDrain(drain_event, True)
# If we've got some objects that can't quiesce immediately, then simulate # If we've got some objects that can't drain immediately, then simulate
if unready_objects > 0: if unready_objects > 0:
quiesce.setCount(unready_objects) drain_event.setCount(unready_objects)
simulate() simulate()
cc_main.cleanupCountedQuiesce(quiesce) cc_main.cleanupCountedDrain(drain_event)
def resume(root): def resume(root):
root.resume() root.resume()
@ -228,7 +228,7 @@ def resume(root):
def checkpoint(root): def checkpoint(root):
if not isinstance(root, objects.Root): if not isinstance(root, objects.Root):
raise TypeError, "Object is not a root object. Checkpoint must be called on a root object." raise TypeError, "Object is not a root object. Checkpoint must be called on a root object."
doQuiesce(root) doDrain(root)
print "Writing checkpoint" print "Writing checkpoint"
cc_main.serializeAll() cc_main.serializeAll()
resume(root) resume(root)
@ -241,7 +241,7 @@ def changeToAtomic(system):
if not isinstance(system, objects.Root) and not isinstance(system, System): if not isinstance(system, objects.Root) and not isinstance(system, System):
raise TypeError, "Object is not a root or system object. Checkpoint must be " raise TypeError, "Object is not a root or system object. Checkpoint must be "
"called on a root object." "called on a root object."
doQuiesce(system) doDrain(system)
print "Changing memory mode to atomic" print "Changing memory mode to atomic"
system.changeTiming(cc_main.SimObject.Atomic) system.changeTiming(cc_main.SimObject.Atomic)
resume(system) resume(system)
@ -250,7 +250,7 @@ def changeToTiming(system):
if not isinstance(system, objects.Root) and not isinstance(system, System): if not isinstance(system, objects.Root) and not isinstance(system, System):
raise TypeError, "Object is not a root or system object. Checkpoint must be " raise TypeError, "Object is not a root or system object. Checkpoint must be "
"called on a root object." "called on a root object."
doQuiesce(system) doDrain(system)
print "Changing memory mode to timing" print "Changing memory mode to timing"
system.changeTiming(cc_main.SimObject.Timing) system.changeTiming(cc_main.SimObject.Timing)
resume(system) resume(system)
@ -271,16 +271,16 @@ def switchCpus(cpuList):
if not isinstance(cpu, objects.BaseCPU): if not isinstance(cpu, objects.BaseCPU):
raise TypeError, "%s is not of type BaseCPU", cpu raise TypeError, "%s is not of type BaseCPU", cpu
# Quiesce all of the individual CPUs # Drain all of the individual CPUs
quiesce = cc_main.createCountedQuiesce() drain_event = cc_main.createCountedDrain()
unready_cpus = 0 unready_cpus = 0
for old_cpu in old_cpus: for old_cpu in old_cpus:
unready_cpus += old_cpu.startQuiesce(quiesce, False) unready_cpus += old_cpu.startDrain(drain_event, False)
# If we've got some objects that can't quiesce immediately, then simulate # If we've got some objects that can't drain immediately, then simulate
if unready_cpus > 0: if unready_cpus > 0:
quiesce.setCount(unready_cpus) drain_event.setCount(unready_cpus)
simulate() simulate()
cc_main.cleanupCountedQuiesce(quiesce) cc_main.cleanupCountedDrain(drain_event)
# Now all of the CPUs are ready to be switched out # Now all of the CPUs are ready to be switched out
for old_cpu in old_cpus: for old_cpu in old_cpus:
old_cpu._ccObject.switchOut() old_cpu._ccObject.switchOut()

View file

@ -543,15 +543,15 @@ class SimObject(object):
for child in self._children.itervalues(): for child in self._children.itervalues():
child.connectPorts() child.connectPorts()
def startQuiesce(self, quiesce_event, recursive): def startDrain(self, drain_event, recursive):
count = 0 count = 0
# ParamContexts don't serialize # ParamContexts don't serialize
if isinstance(self, SimObject) and not isinstance(self, ParamContext): if isinstance(self, SimObject) and not isinstance(self, ParamContext):
if self._ccObject.quiesce(quiesce_event): if self._ccObject.drain(drain_event):
count = 1 count = 1
if recursive: if recursive:
for child in self._children.itervalues(): for child in self._children.itervalues():
count += child.startQuiesce(quiesce_event, True) count += child.startDrain(drain_event, True)
return count return count
def resume(self): def resume(self):

View file

@ -523,19 +523,19 @@ simulate(Tick num_cycles = -1)
} }
Event * Event *
createCountedQuiesce() createCountedDrain()
{ {
return new CountedQuiesceEvent(); return new CountedDrainEvent();
} }
void void
cleanupCountedQuiesce(Event *counted_quiesce) cleanupCountedDrain(Event *counted_drain)
{ {
CountedQuiesceEvent *event = CountedDrainEvent *event =
dynamic_cast<CountedQuiesceEvent *>(counted_quiesce); dynamic_cast<CountedDrainEvent *>(counted_drain);
if (event == NULL) { if (event == NULL) {
fatal("Called cleanupCountedQuiesce() on an event that was not " fatal("Called cleanupCountedDrain() on an event that was not "
"a CountedQuiesceEvent."); "a CountedDrainEvent.");
} }
assert(event->getCount() == 0); assert(event->getCount() == 0);
delete event; delete event;

View file

@ -79,10 +79,10 @@ exitSimLoop(const std::string &message, int exit_code)
} }
void void
CountedQuiesceEvent::process() CountedDrainEvent::process()
{ {
if (--count == 0) { if (--count == 0) {
exitSimLoop("Finished quiesce"); exitSimLoop("Finished drain");
} }
} }

View file

@ -67,13 +67,13 @@ class SimLoopExitEvent : public Event
virtual const char *description(); virtual const char *description();
}; };
class CountedQuiesceEvent : public SimLoopExitEvent class CountedDrainEvent : public SimLoopExitEvent
{ {
private: private:
// Count down to quiescing // Count of how many objects have not yet drained
int count; int count;
public: public:
CountedQuiesceEvent() CountedDrainEvent()
: count(0) : count(0)
{ } { }
void process(); void process();

View file

@ -271,22 +271,22 @@ SimObject::recordEvent(const std::string &stat)
} }
bool bool
SimObject::quiesce(Event *quiesce_event) SimObject::drain(Event *drain_event)
{ {
if (state != QuiescedAtomic && state != Atomic) { if (state != DrainedAtomic && state != Atomic) {
panic("Must implement your own quiesce function if it is to be used " panic("Must implement your own drain function if it is to be used "
"in timing mode!"); "in timing mode!");
} }
state = QuiescedAtomic; state = DrainedAtomic;
return false; return false;
} }
void void
SimObject::resume() SimObject::resume()
{ {
if (state == QuiescedAtomic) { if (state == DrainedAtomic) {
state = Atomic; state = Atomic;
} else if (state == QuiescedTiming) { } else if (state == DrainedTiming) {
state = Timing; state = Timing;
} }
} }
@ -295,10 +295,10 @@ void
SimObject::setMemoryMode(State new_mode) SimObject::setMemoryMode(State new_mode)
{ {
assert(new_mode == Timing || new_mode == Atomic); assert(new_mode == Timing || new_mode == Atomic);
if (state == QuiescedAtomic && new_mode == Timing) { if (state == DrainedAtomic && new_mode == Timing) {
state = QuiescedTiming; state = DrainedTiming;
} else if (state == QuiescedTiming && new_mode == Atomic) { } else if (state == DrainedTiming && new_mode == Atomic) {
state = QuiescedAtomic; state = DrainedAtomic;
} else { } else {
state = new_mode; state = new_mode;
} }

View file

@ -62,9 +62,9 @@ class SimObject : public Serializable, protected StartupCallback
enum State { enum State {
Atomic, Atomic,
Timing, Timing,
Quiescing, Draining,
QuiescedAtomic, DrainedAtomic,
QuiescedTiming DrainedTiming
}; };
protected: protected:
@ -117,7 +117,7 @@ class SimObject : public Serializable, protected StartupCallback
// Methods to drain objects in order to take checkpoints // Methods to drain objects in order to take checkpoints
// Or switch from timing -> atomic memory model // Or switch from timing -> atomic memory model
// Quiesce returns true if the SimObject cannot quiesce immediately. // Quiesce returns true if the SimObject cannot quiesce immediately.
virtual bool quiesce(Event *quiesce_event); virtual bool drain(Event *drain_event);
virtual void resume(); virtual void resume();
virtual void setMemoryMode(State new_mode); virtual void setMemoryMode(State new_mode);
virtual void switchOut(); virtual void switchOut();