O3: Skipping mem-order violation check for uncachable loads.
Uncachable load is not executed until it reaches the head of the ROB, hence cannot cause one.
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e6a0be648e
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3 changed files with 21 additions and 11 deletions
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@ -1150,9 +1150,9 @@ DefaultFetch<Impl>::fetch(bool &status_change)
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instruction->setThreadState(cpu->thread[tid]);
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DPRINTF(Fetch, "[tid:%i]: Instruction PC %#x created "
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"[sn:%lli]\n",
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tid, instruction->readPC(), inst_seq);
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DPRINTF(Fetch, "[tid:%i]: Instruction PC %#x (%d) created "
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"[sn:%lli]\n", tid, instruction->readPC(),
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instruction->readMicroPC(), inst_seq);
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//DPRINTF(Fetch, "[tid:%i]: MachInst is %#x\n", tid, ext_inst);
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@ -1318,10 +1318,10 @@ DefaultIEW<Impl>::executeInsts()
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DynInstPtr violator;
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violator = ldstQueue.getMemDepViolator(tid);
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DPRINTF(IEW, "LDSTQ detected a violation. Violator PC: "
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"%#x, inst PC: %#x. Addr is: %#x.\n",
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violator->readPC(), inst->readPC(), inst->physEffAddr);
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DPRINTF(IEW, "LDSTQ detected a violation. Violator PC: %#x "
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"[sn:%lli], inst PC: %#x [sn:%lli]. Addr is: %#x.\n",
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violator->readPC(), violator->seqNum,
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inst->readPC(), inst->seqNum, inst->physEffAddr);
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// Ensure the violating instruction is older than
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// current squash
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/* if (fetchRedirect[tid] &&
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@ -479,9 +479,14 @@ LSQUnit<Impl>::executeLoad(DynInstPtr &inst)
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// are quad word accesses.
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// @todo: Fix this, magic number being used here
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// @todo: Uncachable load is not executed until it reaches
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// the head of the ROB. Once this if checks only the executed
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// loads(as noted above), this check can be removed
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if (loadQueue[load_idx]->effAddrValid &&
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(loadQueue[load_idx]->effAddr >> 8) ==
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(inst->effAddr >> 8)) {
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((loadQueue[load_idx]->effAddr >> 8)
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== (inst->effAddr >> 8)) &&
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!loadQueue[load_idx]->uncacheable()) {
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// A load incorrectly passed this load. Squash and refetch.
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// For now return a fault to show that it was unsuccessful.
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DynInstPtr violator = loadQueue[load_idx];
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@ -553,9 +558,14 @@ LSQUnit<Impl>::executeStore(DynInstPtr &store_inst)
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// are quad word accesses.
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// @todo: Fix this, magic number being used here
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// @todo: Uncachable load is not executed until it reaches
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// the head of the ROB. Once this if checks only the executed
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// loads(as noted above), this check can be removed
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if (loadQueue[load_idx]->effAddrValid &&
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(loadQueue[load_idx]->effAddr >> 8) ==
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(store_inst->effAddr >> 8)) {
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((loadQueue[load_idx]->effAddr >> 8)
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== (store_inst->effAddr >> 8)) &&
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!loadQueue[load_idx]->uncacheable()) {
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// A load incorrectly passed this store. Squash and refetch.
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// For now return a fault to show that it was unsuccessful.
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DynInstPtr violator = loadQueue[load_idx];
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