make activation of exec contexts happen in startup
the registration stuff all moves into BaseCPU cpu/base_cpu.cc: Move the registration stuff into the BaseCPU since all other CPUs use it. cpu/base_cpu.hh: Move the defer registration stuff into the BaseCPU since all other CPUs use it. cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: registration stuff moved to base class sim/system.cc: the activation of exec contexts should happen at startup, not when they are registered. sim/system.hh: the system now has a startup function --HG-- extra : convert_revision : bb6a7c2da5a1ecf5fe7ede1078200bfe5245f8ef
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6 changed files with 30 additions and 27 deletions
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@ -47,21 +47,22 @@ vector<BaseCPU *> BaseCPU::cpuList;
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int maxThreadsPerCPU = 1;
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#ifdef FULL_SYSTEM
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BaseCPU::BaseCPU(const string &_name, int _number_of_threads,
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BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
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Counter max_insts_any_thread,
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Counter max_insts_all_threads,
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Counter max_loads_any_thread,
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Counter max_loads_all_threads,
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System *_system, Tick freq)
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: SimObject(_name), frequency(freq),
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: SimObject(_name), frequency(freq), deferRegistration(_def_reg),
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number_of_threads(_number_of_threads), system(_system)
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#else
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BaseCPU::BaseCPU(const string &_name, int _number_of_threads,
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BaseCPU::BaseCPU(const string &_name, int _number_of_threads, bool _def_reg,
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Counter max_insts_any_thread,
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Counter max_insts_all_threads,
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Counter max_loads_any_thread,
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Counter max_loads_all_threads)
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: SimObject(_name), number_of_threads(_number_of_threads)
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: SimObject(_name), deferRegistration(_def_reg),
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number_of_threads(_number_of_threads)
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#endif
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{
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// add self to global list of CPUs
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@ -126,6 +127,12 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads,
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#endif
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}
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void
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BaseCPU::init()
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{
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if (!deferRegistration)
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registerExecContexts();
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}
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void
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BaseCPU::regStats()
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@ -91,12 +91,12 @@ class BaseCPU : public SimObject
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public:
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#ifdef FULL_SYSTEM
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BaseCPU(const std::string &_name, int _number_of_threads,
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BaseCPU(const std::string &_name, int _number_of_threads, bool _def_reg,
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Counter max_insts_any_thread, Counter max_insts_all_threads,
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Counter max_loads_any_thread, Counter max_loads_all_threads,
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System *_system, Tick freq);
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#else
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BaseCPU(const std::string &_name, int _number_of_threads,
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BaseCPU(const std::string &_name, int _number_of_threads, bool _def_reg,
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Counter max_insts_any_thread = 0,
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Counter max_insts_all_threads = 0,
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Counter max_loads_any_thread = 0,
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@ -105,8 +105,10 @@ class BaseCPU : public SimObject
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virtual ~BaseCPU() {}
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virtual void init();
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virtual void regStats();
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bool deferRegistration;
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void registerExecContexts();
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/// Prepare for another CPU to take over execution. Called by
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@ -140,7 +142,6 @@ class BaseCPU : public SimObject
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#ifdef FULL_SYSTEM
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System *system;
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/**
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* Serialize this object to the given output stream.
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* @param os The stream to serialize to.
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@ -124,7 +124,7 @@ SimpleCPU::SimpleCPU(const string &_name,
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MemInterface *icache_interface,
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MemInterface *dcache_interface,
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bool _def_reg, Tick freq)
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: BaseCPU(_name, /* number_of_threads */ 1,
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: BaseCPU(_name, /* number_of_threads */ 1, _def_reg,
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max_insts_any_thread, max_insts_all_threads,
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max_loads_any_thread, max_loads_all_threads,
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_system, freq),
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@ -137,12 +137,11 @@ SimpleCPU::SimpleCPU(const string &_name, Process *_process,
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MemInterface *icache_interface,
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MemInterface *dcache_interface,
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bool _def_reg)
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: BaseCPU(_name, /* number_of_threads */ 1,
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: BaseCPU(_name, /* number_of_threads */ 1, _def_reg,
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max_insts_any_thread, max_insts_all_threads,
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max_loads_any_thread, max_loads_all_threads),
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#endif
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tickEvent(this), xc(NULL), defer_registration(_def_reg),
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cacheCompletionEvent(this)
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tickEvent(this), xc(NULL), cacheCompletionEvent(this)
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{
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_status = Idle;
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#ifdef FULL_SYSTEM
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@ -176,13 +175,6 @@ SimpleCPU::~SimpleCPU()
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{
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}
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void SimpleCPU::init()
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{
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if (!defer_registration) {
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this->registerExecContexts();
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}
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}
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void
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SimpleCPU::switchOut()
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{
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@ -158,7 +158,6 @@ class SimpleCPU : public BaseCPU
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#endif
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virtual ~SimpleCPU();
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virtual void init();
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// execution context
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ExecContext *xc;
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@ -178,8 +177,6 @@ class SimpleCPU : public BaseCPU
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// L1 data cache
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MemInterface *dcacheInterface;
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bool defer_registration;
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// current instruction
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MachInst inst;
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@ -194,12 +194,6 @@ System::registerExecContext(ExecContext *xc)
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int xcIndex = execContexts.size();
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execContexts.push_back(xc);
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if (xcIndex == 0) {
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// activate with zero delay so that we start ticking right
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// away on cycle 0
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xc->activate(0);
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}
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RemoteGDB *rgdb = new RemoteGDB(this, xc);
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GDBListener *gdbl = new GDBListener(rgdb, 7000 + xcIndex);
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gdbl->listen();
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@ -218,6 +212,16 @@ System::registerExecContext(ExecContext *xc)
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return xcIndex;
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}
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void
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System::startup()
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{
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if (!execContexts.empty()) {
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// activate with zero delay so that we start ticking right
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// away on cycle 0
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execContexts[0]->activate(0);
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}
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}
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void
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System::replaceExecContext(ExecContext *xc, int xcIndex)
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{
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@ -122,6 +122,8 @@ class System : public SimObject
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System(Params *p);
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~System();
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void startup();
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public:
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/**
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* Returns the addess the kernel starts at.
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