ARM: Update the stats now that VFP load/store multiple is implemented.
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9ebaf8ecd5
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4 changed files with 15 additions and 17 deletions
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@ -58,7 +58,7 @@ egid=100
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env=
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env=
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errout=cerr
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errout=cerr
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euid=100
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euid=100
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executable=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/hello/bin/arm/linux/hello
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executable=/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
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gid=100
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gid=100
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input=cin
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input=cin
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max_stack_size=67108864
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max_stack_size=67108864
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@ -1,5 +1,3 @@
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warn: Sockets disabled, not accepting gdb connections
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warn: Sockets disabled, not accepting gdb connections
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For more information see: http://www.m5sim.org/warn/d946bea6
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For more information see: http://www.m5sim.org/warn/d946bea6
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warn: instruction 'fstmx' unimplemented
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For more information see: http://www.m5sim.org/warn/21b09adb
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hack: be nice to actually delete the event here
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hack: be nice to actually delete the event here
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@ -5,12 +5,12 @@ The Regents of The University of Michigan
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All Rights Reserved
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All Rights Reserved
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M5 compiled Feb 25 2010 04:11:39
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M5 compiled Feb 27 2010 16:56:18
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M5 revision 1a33ca29ec29 6980 default share-aware-test-update.patch tip qtip
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M5 revision 6429cd018766 7083 default qtip vfpmacromemstats.patch tip
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M5 started Feb 25 2010 04:11:44
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M5 started Feb 27 2010 16:56:19
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M5 executing on SC2B0619
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M5 executing on tater
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command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/quick/00.hello/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/fast/quick/00.hello/arm/linux/simple-atomic
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command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/quick/00.hello/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/fast/quick/00.hello/arm/linux/simple-atomic
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Global frequency set at 1000000000000 ticks per second
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Global frequency set at 1000000000000 ticks per second
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info: Entering event queue @ 0. Starting simulation...
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info: Entering event queue @ 0. Starting simulation...
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Hello world!
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Hello world!
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Exiting @ tick 2748500 because target called exit()
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Exiting @ tick 2756500 because target called exit()
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@ -1,13 +1,13 @@
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---------- Begin Simulation Statistics ----------
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---------- Begin Simulation Statistics ----------
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host_inst_rate 1074248 # Simulator instruction rate (inst/s)
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host_inst_rate 15740 # Simulator instruction rate (inst/s)
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host_mem_usage 180696 # Number of bytes of host memory used
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host_mem_usage 201240 # Number of bytes of host memory used
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host_seconds 0.01 # Real time elapsed on the host
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host_seconds 0.35 # Real time elapsed on the host
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host_tick_rate 511253720 # Simulator tick rate (ticks/s)
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host_tick_rate 7864008 # Simulator tick rate (ticks/s)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_insts 5498 # Number of instructions simulated
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sim_insts 5514 # Number of instructions simulated
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sim_seconds 0.000003 # Number of seconds simulated
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sim_seconds 0.000003 # Number of seconds simulated
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sim_ticks 2748500 # Number of ticks simulated
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sim_ticks 2756500 # Number of ticks simulated
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system.cpu.dtb.accesses 0 # DTB accesses
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system.cpu.dtb.accesses 0 # DTB accesses
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system.cpu.dtb.hits 0 # DTB hits
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system.cpu.dtb.hits 0 # DTB hits
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system.cpu.dtb.misses 0 # DTB misses
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system.cpu.dtb.misses 0 # DTB misses
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@ -28,9 +28,9 @@ system.cpu.itb.write_accesses 0 # DT
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system.cpu.itb.write_hits 0 # DTB write hits
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system.cpu.itb.write_hits 0 # DTB write hits
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system.cpu.itb.write_misses 0 # DTB write misses
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system.cpu.itb.write_misses 0 # DTB write misses
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.numCycles 5498 # number of cpu cycles simulated
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system.cpu.numCycles 5514 # number of cpu cycles simulated
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system.cpu.num_insts 5498 # Number of instructions executed
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system.cpu.num_insts 5514 # Number of instructions executed
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system.cpu.num_refs 2127 # Number of memory references
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system.cpu.num_refs 2143 # Number of memory references
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system.cpu.workload.PROG:num_syscalls 13 # Number of system calls
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system.cpu.workload.PROG:num_syscalls 13 # Number of system calls
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---------- End Simulation Statistics ----------
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---------- End Simulation Statistics ----------
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