kvm, arm: Refactor KVM GIC device
Factor out the kernel device wrapper from the KvmGIC and put it in a separate class. This will simplify a future kernel/gem5 hybrid GIC. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Radhika Jagtap <radhika.jagtap@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
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2 changed files with 158 additions and 51 deletions
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015 ARM Limited
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* Copyright (c) 2015-2016 ARM Limited
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* All rights reserved
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* All rights reserved
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*
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*
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* The license below extends only to copyright in the software and shall
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* The license below extends only to copyright in the software and shall
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@ -44,21 +44,69 @@
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#include "debug/Interrupt.hh"
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#include "debug/Interrupt.hh"
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#include "params/KvmGic.hh"
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#include "params/KvmGic.hh"
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KvmKernelGicV2::KvmKernelGicV2(KvmVM &_vm, Addr cpu_addr, Addr dist_addr)
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: cpuRange(RangeSize(cpu_addr, KVM_VGIC_V2_CPU_SIZE)),
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distRange(RangeSize(dist_addr, KVM_VGIC_V2_DIST_SIZE)),
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vm(_vm),
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kdev(vm.createDevice(KVM_DEV_TYPE_ARM_VGIC_V2))
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{
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kdev.setAttr<uint64_t>(
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KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_DIST, dist_addr);
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kdev.setAttr<uint64_t>(
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KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_CPU, cpu_addr);
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}
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KvmKernelGicV2::~KvmKernelGicV2()
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{
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}
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void
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KvmKernelGicV2::setSPI(unsigned spi)
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{
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setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, true);
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}
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void
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KvmKernelGicV2::clearSPI(unsigned spi)
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{
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setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, false);
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}
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void
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KvmKernelGicV2::setPPI(unsigned vcpu, unsigned ppi)
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{
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setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, true);
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}
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void
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KvmKernelGicV2::clearPPI(unsigned vcpu, unsigned ppi)
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{
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setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, false);
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}
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void
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KvmKernelGicV2::setIntState(unsigned type, unsigned vcpu, unsigned irq,
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bool high)
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{
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assert(type <= KVM_ARM_IRQ_TYPE_MASK);
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assert(vcpu <= KVM_ARM_IRQ_VCPU_MASK);
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assert(irq <= KVM_ARM_IRQ_NUM_MASK);
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const uint32_t line(
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(type << KVM_ARM_IRQ_TYPE_SHIFT) |
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(vcpu << KVM_ARM_IRQ_VCPU_SHIFT) |
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(irq << KVM_ARM_IRQ_NUM_SHIFT));
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vm.setIRQLine(line, high);
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}
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KvmGic::KvmGic(const KvmGicParams *p)
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KvmGic::KvmGic(const KvmGicParams *p)
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: BaseGic(p),
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: BaseGic(p),
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system(*p->system),
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system(*p->system),
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vm(*p->kvmVM),
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kernelGic(*p->kvmVM, p->cpu_addr, p->dist_addr),
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kdev(vm.createDevice(KVM_DEV_TYPE_ARM_VGIC_V2)),
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addrRanges{kernelGic.distRange, kernelGic.cpuRange}
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distRange(RangeSize(p->dist_addr, KVM_VGIC_V2_DIST_SIZE)),
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cpuRange(RangeSize(p->cpu_addr, KVM_VGIC_V2_CPU_SIZE)),
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addrRanges{distRange, cpuRange}
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{
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{
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kdev.setAttr<uint64_t>(
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KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_DIST,
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p->dist_addr);
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kdev.setAttr<uint64_t>(
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KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_CPU,
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p->cpu_addr);
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}
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}
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KvmGic::~KvmGic()
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KvmGic::~KvmGic()
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@ -93,28 +141,28 @@ void
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KvmGic::sendInt(uint32_t num)
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KvmGic::sendInt(uint32_t num)
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{
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{
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DPRINTF(Interrupt, "Set SPI %d\n", num);
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DPRINTF(Interrupt, "Set SPI %d\n", num);
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setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, num, true);
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kernelGic.setSPI(num);
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}
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}
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void
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void
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KvmGic::clearInt(uint32_t num)
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KvmGic::clearInt(uint32_t num)
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{
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{
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DPRINTF(Interrupt, "Clear SPI %d\n", num);
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DPRINTF(Interrupt, "Clear SPI %d\n", num);
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setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, num, false);
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kernelGic.clearSPI(num);
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}
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}
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void
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void
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KvmGic::sendPPInt(uint32_t num, uint32_t cpu)
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KvmGic::sendPPInt(uint32_t num, uint32_t cpu)
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{
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{
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DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num);
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DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num);
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setIntState(KVM_ARM_IRQ_TYPE_PPI, cpu, num, true);
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kernelGic.setPPI(cpu, num);
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}
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}
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void
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void
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KvmGic::clearPPInt(uint32_t num, uint32_t cpu)
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KvmGic::clearPPInt(uint32_t num, uint32_t cpu)
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{
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{
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DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num);
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DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num);
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setIntState(KVM_ARM_IRQ_TYPE_PPI, cpu, num, false);
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kernelGic.clearPPI(cpu, num);
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}
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}
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void
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void
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@ -126,20 +174,6 @@ KvmGic::verifyMemoryMode() const
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}
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}
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}
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}
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void
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KvmGic::setIntState(uint8_t type, uint8_t vcpu, uint16_t irq, bool high)
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{
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assert(type < KVM_ARM_IRQ_TYPE_MASK);
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assert(vcpu < KVM_ARM_IRQ_VCPU_MASK);
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assert(irq < KVM_ARM_IRQ_NUM_MASK);
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const uint32_t line(
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(type << KVM_ARM_IRQ_TYPE_SHIFT) |
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(vcpu << KVM_ARM_IRQ_VCPU_SHIFT) |
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(irq << KVM_ARM_IRQ_NUM_SHIFT));
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vm.setIRQLine(line, high);
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}
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KvmGic *
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KvmGic *
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KvmGicParams::create()
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KvmGicParams::create()
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/*
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/*
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* Copyright (c) 2015 ARM Limited
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* Copyright (c) 2015-2016 ARM Limited
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* All rights reserved
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* All rights reserved
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*
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*
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* The license below extends only to copyright in the software and shall
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* The license below extends only to copyright in the software and shall
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@ -46,7 +46,95 @@
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#include "dev/arm/base_gic.hh"
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#include "dev/arm/base_gic.hh"
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#include "dev/platform.hh"
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#include "dev/platform.hh"
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class KvmGicParams;
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/**
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* KVM in-kernel GIC abstraction
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*
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* This class defines a high-level interface to the KVM in-kernel GIC
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* model. It exposes an API that is similar to that of
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* software-emulated GIC models in gem5.
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*/
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class KvmKernelGicV2
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{
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public:
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/**
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* Instantiate a KVM in-kernel GIC model.
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*
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* This constructor instantiates an in-kernel GIC model and wires
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* it up to the virtual memory system.
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*
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* @param vm KVM VM representing this system
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* @param cpu_addr GIC CPU interface base address
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* @param dist_addr GIC distributor base address
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*/
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KvmKernelGicV2(KvmVM &vm, Addr cpu_addr, Addr dist_addr);
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virtual ~KvmKernelGicV2();
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KvmKernelGicV2(const KvmKernelGicV2 &other) = delete;
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KvmKernelGicV2(const KvmKernelGicV2 &&other) = delete;
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KvmKernelGicV2 &operator=(const KvmKernelGicV2 &&rhs) = delete;
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KvmKernelGicV2 &operator=(const KvmKernelGicV2 &rhs) = delete;
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public:
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/**
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* @{
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* @name In-kernel GIC API
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*/
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/**
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* Raise a shared peripheral interrupt
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*
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* @param spi SPI number
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*/
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void setSPI(unsigned spi);
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/**
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* Clear a shared peripheral interrupt
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*
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* @param spi SPI number
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*/
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void clearSPI(unsigned spi);
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/**
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* Raise a private peripheral interrupt
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*
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* @param vcpu KVM virtual CPU number
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* @parma ppi PPI interrupt number
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*/
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void setPPI(unsigned vcpu, unsigned ppi);
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/**
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* Clear a private peripheral interrupt
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*
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* @param vcpu KVM virtual CPU number
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* @parma ppi PPI interrupt number
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*/
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void clearPPI(unsigned vcpu, unsigned ppi);
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/** Address range for the CPU interfaces */
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const AddrRange cpuRange;
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/** Address range for the distributor interface */
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const AddrRange distRange;
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/* @} */
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protected:
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/**
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* Update the kernel's VGIC interrupt state
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*
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* @param type Interrupt type (KVM_ARM_IRQ_TYPE_PPI/KVM_ARM_IRQ_TYPE_SPI)
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* @param vcpu CPU id within KVM (ignored for SPIs)
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* @param irq Interrupt number
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* @param high True to signal an interrupt, false to clear it.
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*/
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void setIntState(unsigned type, unsigned vcpu, unsigned irq, bool high);
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/** KVM VM in the parent system */
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KvmVM &vm;
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/** Kernel interface to the GIC */
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KvmDevice kdev;
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};
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struct KvmGicParams;
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/**
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/**
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* In-kernel GIC model.
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* In-kernel GIC model.
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@ -105,27 +193,12 @@ class KvmGic : public BaseGic
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*/
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*/
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void verifyMemoryMode() const;
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void verifyMemoryMode() const;
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/**
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* Update the kernel's VGIC interrupt state
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*
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* @param type Interrupt type (KVM_ARM_IRQ_TYPE_PPI/KVM_ARM_IRQ_TYPE_SPI)
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* @param vcpu CPU id within KVM (ignored for SPIs)
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* @param irq Interrupt number
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* @param high True to signal an interrupt, false to clear it.
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*/
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void setIntState(uint8_t type, uint8_t vcpu, uint16_t irq, bool high);
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/** System this interrupt controller belongs to */
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/** System this interrupt controller belongs to */
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System &system;
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System &system;
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/** VM for this system */
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KvmVM &vm;
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/** Kernel interface to the GIC */
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KvmDevice kdev;
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/** Address range for the distributor interface */
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/** Kernel GIC device */
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const AddrRange distRange;
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KvmKernelGicV2 kernelGic;
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/** Address range for the CPU interfaces */
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const AddrRange cpuRange;
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/** Union of all memory */
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/** Union of all memory */
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const AddrRangeList addrRanges;
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const AddrRangeList addrRanges;
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};
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};
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