diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh index c73e79024..b22b2fa29 100644 --- a/arch/alpha/isa_traits.hh +++ b/arch/alpha/isa_traits.hh @@ -121,6 +121,11 @@ class AlphaISA Addr lock_addr; // lock address for LL/SC } MiscRegFile; +static const Addr PageShift = 13; +static const Addr PageBytes = ULL(1) << PageShift; +static const Addr PageMask = ~(PageBytes - 1); +static const Addr PageOffset = PageBytes - 1; + #ifdef FULL_SYSTEM typedef uint64_t InternalProcReg; diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index d25f80c6d..8ea5798ea 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -345,13 +345,13 @@ SimpleCPU::copySrcTranslate(Addr src) int offset = src & (blk_size - 1); // Make sure block doesn't span page - if (no_warn && (src & (~8191)) != ((src + blk_size) & (~8191)) && + if (no_warn && + (src & TheISA::PageMask) != ((src + blk_size) & TheISA::PageMask) && (src >> 40) != 0xfffffc) { warn("Copied block source spans pages %x.", src); no_warn = false; } - memReq->reset(src & ~(blk_size - 1), blk_size); // translate to physical address @@ -381,7 +381,8 @@ SimpleCPU::copy(Addr dest) int offset = dest & (blk_size - 1); // Make sure block doesn't span page - if (no_warn && (dest & (~8191)) != ((dest + blk_size) & (~8191)) && + if (no_warn && + (dest & TheISA::PageMask) != ((dest + blk_size) & TheISA::PageMask) && (dest >> 40) != 0xfffffc) { no_warn = false; warn("Copied block destination spans pages %x. ", dest); diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 451c801ee..d0000dc5b 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -249,8 +249,7 @@ class SimpleCPU : public BaseCPU Fault read(Addr addr, T &data, unsigned flags); template - Fault write(T data, Addr addr, unsigned flags, - uint64_t *res); + Fault write(T data, Addr addr, unsigned flags, uint64_t *res); void prefetch(Addr addr, unsigned flags) {