Removed "adding instead of dividing" trick.
Caused slowdown in performance instead of speeding up. src/cpu/base.cc: Removed "adding instead of dividing" trick. src/mem/bus.cc: Fixed spelling in comments. Removed "adding instead of dividing" trick. --HG-- extra : convert_revision : 65a736f4f09a64e737dc7aeee53b117976330488
This commit is contained in:
parent
f65e2710ec
commit
d540dde5b4
|
@ -269,12 +269,10 @@ Tick
|
||||||
BaseCPU::nextCycle(Tick begin_tick)
|
BaseCPU::nextCycle(Tick begin_tick)
|
||||||
{
|
{
|
||||||
Tick next_tick = begin_tick;
|
Tick next_tick = begin_tick;
|
||||||
next_tick -= (next_tick % clock);
|
if (next_tick % clock != 0)
|
||||||
|
next_tick = next_tick - (next_tick % clock) + clock;
|
||||||
next_tick += phase;
|
next_tick += phase;
|
||||||
|
|
||||||
while (next_tick < curTick)
|
|
||||||
next_tick += clock;
|
|
||||||
|
|
||||||
assert(next_tick >= curTick);
|
assert(next_tick >= curTick);
|
||||||
return next_tick;
|
return next_tick;
|
||||||
}
|
}
|
||||||
|
|
|
@ -115,11 +115,14 @@ void Bus::occupyBus(PacketPtr pkt)
|
||||||
//Bring tickNextIdle up to the present tick
|
//Bring tickNextIdle up to the present tick
|
||||||
//There is some potential ambiguity where a cycle starts, which might make
|
//There is some potential ambiguity where a cycle starts, which might make
|
||||||
//a difference when devices are acting right around a cycle boundary. Using
|
//a difference when devices are acting right around a cycle boundary. Using
|
||||||
//a < allows things which happen exactly on a cycle boundary to take up only
|
//a < allows things which happen exactly on a cycle boundary to take up
|
||||||
//the following cycle. Anthing that happens later will have to "wait" for
|
//only the following cycle. Anything that happens later will have to "wait"
|
||||||
//the end of that cycle, and then start using the bus after that.
|
//for the end of that cycle, and then start using the bus after that.
|
||||||
while (tickNextIdle < curTick)
|
if (tickNextIdle < curTick) {
|
||||||
tickNextIdle += clock;
|
tickNextIdle = curTick;
|
||||||
|
if (tickNextIdle % clock != 0)
|
||||||
|
tickNextIdle -= (curTick % clock) + clock;
|
||||||
|
}
|
||||||
|
|
||||||
// The packet will be sent. Figure out how long it occupies the bus, and
|
// The packet will be sent. Figure out how long it occupies the bus, and
|
||||||
// how much of that time is for the first "word", aka bus width.
|
// how much of that time is for the first "word", aka bus width.
|
||||||
|
@ -132,10 +135,9 @@ void Bus::occupyBus(PacketPtr pkt)
|
||||||
// We're using the "adding instead of dividing" trick again here
|
// We're using the "adding instead of dividing" trick again here
|
||||||
if (pkt->hasData()) {
|
if (pkt->hasData()) {
|
||||||
int dataSize = pkt->getSize();
|
int dataSize = pkt->getSize();
|
||||||
for (int transmitted = 0; transmitted < dataSize;
|
numCycles += dataSize/width;
|
||||||
transmitted += width) {
|
if (dataSize % width)
|
||||||
numCycles++;
|
numCycles++;
|
||||||
}
|
|
||||||
} else {
|
} else {
|
||||||
// If the packet didn't have data, it must have been a response.
|
// If the packet didn't have data, it must have been a response.
|
||||||
// Those use the bus for one cycle to send their data.
|
// Those use the bus for one cycle to send their data.
|
||||||
|
|
Loading…
Reference in a new issue