diff --git a/src/mem/ruby/system/CacheMemory.cc b/src/mem/ruby/system/CacheMemory.cc
index c22572cc3..fbf303ed8 100644
--- a/src/mem/ruby/system/CacheMemory.cc
+++ b/src/mem/ruby/system/CacheMemory.cc
@@ -427,31 +427,6 @@ CacheMemory::printStats(ostream& out) const
     m_profiler_ptr->printStats(out);
 }
 
-void
-CacheMemory::getMemoryValue(const Address& addr, char* value,
-                            unsigned size_in_bytes)
-{
-    AbstractCacheEntry* entry = lookup(line_address(addr));
-    unsigned startByte = addr.getAddress() - line_address(addr).getAddress();
-    for (unsigned i = 0; i < size_in_bytes; ++i) {
-        value[i] = entry->getDataBlk().getByte(i + startByte);
-    }
-}
-
-void
-CacheMemory::setMemoryValue(const Address& addr, char* value,
-                            unsigned size_in_bytes)
-{
-    AbstractCacheEntry* entry = lookup(line_address(addr));
-    unsigned startByte = addr.getAddress() - line_address(addr).getAddress();
-    assert(size_in_bytes > 0);
-    for (unsigned i = 0; i < size_in_bytes; ++i) {
-        entry->getDataBlk().setByte(i + startByte, value[i]);
-    }
-
-    // entry = lookup(line_address(addr));
-}
-
 void
 CacheMemory::setLocked(const Address& address, int context)
 {
diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh
index 4e4206e8d..c355ae2e3 100644
--- a/src/mem/ruby/system/CacheMemory.hh
+++ b/src/mem/ruby/system/CacheMemory.hh
@@ -117,11 +117,6 @@ class CacheMemory : public SimObject
                                RubyAccessMode accessType,
                                PrefetchBit pfBit);
 
-    void getMemoryValue(const Address& addr, char* value,
-                        unsigned int size_in_bytes);
-    void setMemoryValue(const Address& addr, char* value,
-                        unsigned int size_in_bytes);
-
     void setLocked (const Address& addr, int context);
     void clearLocked (const Address& addr);
     bool isLocked (const Address& addr, int context);