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x86: Implementation of Int3 and Int_Ib in long mode

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This is an implementation of the x86 int3 and int immediate
instructions for long mode according to 'AMD64 Programmers Manual
Volume 3'.
This commit is contained in:
Christian Menard 2013-11-26 17:51:07 +01:00
parent e5d63d0535
commit d4f205ea2f
2 changed files with 32 additions and 2 deletions
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6
src/arch/x86/isa/decoder/one_byte_opcodes.isa
View file

@ -393,8 +393,8 @@
0x3, 0x4: ret_far_real();
default: Inst::RET_FAR();
}
0x4: int3();
0x5: decode FullSystemInt default int_Ib() {
0x4: Inst::INT3();
0x5: decode FullSystemInt default inst_ib() {
0: decode IMMEDIATE {
// Really only the LSB matters, but the decoder
// will sign extend it, and there's no easy way to
@ -403,6 +403,8 @@
SyscallInst::int80('xc->syscall(Rax)',
IsSyscall, IsNonSpeculative, IsSerializeAfter);
}
default: Inst::INT(Ib);
}
0x6: decode MODE_SUBMODE {
0x0: Inst::UD2();

28
src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
View file

@ -221,6 +221,34 @@ skipSegmentSquashing:
def macroop IRET_VIRT {
panic "Virtual mode iret isn't implemented!"
};
def macroop INT3 {
limm t1, 0x03, dataSize=8
rdip t7
# Are we in long mode?
rdm5reg t5
andi t0, t5, 0x1, flags=(EZF,)
br rom_label("longModeSoftInterrupt"), flags=(CEZF,)
br rom_label("legacyModeInterrupt")
};
def macroop INT_I {
#load the byte-sized interrupt vector specified in the instruction
.adjust_imm trimImm(8)
limm t1, imm, dataSize=8
rdip t7
# Are we in long mode?
rdm5reg t5
andi t0, t5, 0x1, flags=(EZF,)
br rom_label("longModeSoftInterrupt"), flags=(CEZF,)
br rom_label("legacyModeInterrupt")
};
'''
#let {{
# class INT(Inst):