Add in operand which holds the condition code bits of the flag register.
--HG-- extra : convert_revision : 416052f41fccc8286b3bdbe8d559512a761224f2
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@ -103,5 +103,6 @@ def operands {{
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'Index': ('IntReg', 'uqw', 'index', 'IsInteger', 5),
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'Data': ('IntReg', 'uqw', 'data', 'IsInteger', 6),
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'RIP': ('NPC', 'uqw', None, (None, None, 'IsControl'), 10),
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'ccFlagBits': ('IntReg', 'uqw', 'NUM_INTREGS + NumMicroIntRegs', None, 20),
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'Mem': ('Mem', 'uqw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 100)
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}};
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