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cpu: Fix O3 uncacheable load that is replayed but misses the TLB

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This change fixes an issue in the O3 CPU where an uncachable instruction
is attempted to be executed before it reaches the head of the ROB. It is
determined to be uncacheable, and is replayed, but a PanicFault is attached
to the instruction to make sure that it is properly executed before
committing. If the TLB entry it was using is replaced in the interveaning
time, the TLB returns a delayed translation when the load is replayed at
the head of the ROB, however the LSQ code can't differntiate between the
old fault and the new one. If the translation isn't complete it can't
be faulting, so clear the fault.
This commit is contained in:
Ali Saidi 2013-10-17 10:20:45 -05:00
parent 60ce2b34fe
commit cf266f05a9
1 changed files with 15 additions and 0 deletions
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15
src/cpu/base_dyn_inst.hh
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@ -1009,8 +1009,16 @@ BaseDynInst<Impl>::initiateTranslation(RequestPtr req, RequestPtr sreqLow,
// One translation if the request isn't split.
DataTranslation<BaseDynInstPtr> *trans =
new DataTranslation<BaseDynInstPtr>(this, state);
cpu->dtb->translateTiming(req, thread->getTC(), trans, mode);
if (!translationCompleted()) {
// The translation isn't yet complete, so we can't possibly have a
// fault. Overwrite any existing fault we might have from a previous
// execution of this instruction (e.g. an uncachable load that
// couldn't execute because it wasn't at the head of the ROB).
fault = NoFault;
// Save memory requests.
savedReq = state->mainReq;
savedSreqLow = state->sreqLow;
@ -1028,7 +1036,14 @@ BaseDynInst<Impl>::initiateTranslation(RequestPtr req, RequestPtr sreqLow,
cpu->dtb->translateTiming(sreqLow, thread->getTC(), stransLow, mode);
cpu->dtb->translateTiming(sreqHigh, thread->getTC(), stransHigh, mode);
if (!translationCompleted()) {
// The translation isn't yet complete, so we can't possibly have a
// fault. Overwrite any existing fault we might have from a previous
// execution of this instruction (e.g. an uncachable load that
// couldn't execute because it wasn't at the head of the ROB).
fault = NoFault;
// Save memory requests.
savedReq = state->mainReq;
savedSreqLow = state->sreqLow;