Touched up faults, and made POR actually do something.
--HG-- extra : convert_revision : 38951352edbfc423fb6767a9aac49a703578c0ac
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9ef51f2dba
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cee4d1c113
1 changed files with 32 additions and 18 deletions
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@ -283,7 +283,7 @@ void enterREDState(ThreadContext *tc)
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HPSTATE |= (1 << 5);
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//HPSTATE.hpriv = 1
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HPSTATE |= (1 << 2);
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tc->setMiscReg(MISCREG_HPSTATE, HPSTATE);
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tc->setMiscRegWithEffect(MISCREG_HPSTATE, HPSTATE);
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}
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/**
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@ -491,11 +491,11 @@ void doNormalFault(ThreadContext *tc, TrapType tt, bool gotoHpriv)
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}
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}
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void getREDVector(Addr & PC, Addr & NPC)
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void getREDVector(MiscReg TT, Addr & PC, Addr & NPC)
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{
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//XXX The following constant might belong in a header file.
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const Addr RSTVAddr = 0xFFFFFFFFF0000000ULL;
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PC = RSTVAddr | 0xA0;
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PC = RSTVAddr | ((TT << 5) & 0xFF);
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NPC = PC + sizeof(MachInst);
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}
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@ -519,6 +519,7 @@ void getPrivVector(ThreadContext * tc, Addr & PC, Addr & NPC, MiscReg TT, MiscRe
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void SparcFaultBase::invoke(ThreadContext * tc)
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{
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panic("Invoking a second fault!\n");
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FaultBase::invoke(tc);
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countStat()++;
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@ -543,7 +544,7 @@ void SparcFaultBase::invoke(ThreadContext * tc)
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if(HPSTATE & (1 << 5) || TL == MaxTL - 1)
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{
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getREDVector(PC, NPC);
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getREDVector(5, PC, NPC);
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enterREDState(tc);
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doREDFault(tc, TT);
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}
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@ -583,28 +584,41 @@ void PowerOnReset::invoke(ThreadContext * tc)
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//For SPARC, when a system is first started, there is a power
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//on reset Trap which sets the processor into the following state.
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//Bits that aren't set aren't defined on startup.
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tc->setMiscReg(MISCREG_TL, MaxTL);
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tc->setMiscReg(MISCREG_TT, trapType());
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tc->setMiscRegWithEffect(MISCREG_GL, MaxGL);
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//Turn on pef, set everything else to 0
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tc->setMiscReg(MISCREG_PSTATE, 1 << 4);
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//Turn on red and hpriv, set everything else to 0
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tc->setMiscReg(MISCREG_HPSTATE, (1 << 5) | (1 << 2));
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//The tick register is unreadable by nonprivileged software
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tc->setMiscReg(MISCREG_TICK, 1ULL << 63);
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Addr PC, NPC;
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getREDVector(trapType(), PC, NPC);
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tc->setPC(PC);
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tc->setNextPC(NPC);
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tc->setNextNPC(NPC + sizeof(MachInst));
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//These registers are specified as "undefined" after a POR, and they
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//should have reasonable values after the miscregfile is reset
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/*
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tl = MaxTL;
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gl = MaxGL;
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tickFields.counter = 0; //The TICK register is unreadable bya
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tickFields.npt = 1; //The TICK register is unreadable by by !priv
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softint = 0; // Clear all the soft interrupt bits
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tick_cmprFields.int_dis = 1; // disable timer compare interrupts
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// Clear all the soft interrupt bits
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softint = 0;
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// disable timer compare interrupts, reset tick_cmpr
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tc->setMiscReg(MISCREG_
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tick_cmprFields.int_dis = 1;
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tick_cmprFields.tick_cmpr = 0; // Reset to 0 for pretty printing
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stickFields.npt = 1; //The TICK register is unreadable by by !priv
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stick_cmprFields.int_dis = 1; // disable timer compare interrupts
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stick_cmprFields.tick_cmpr = 0; // Reset to 0 for pretty printing
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tt[tl] = _trapType;
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pstate = 0; // fields 0 but pef
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pstateFields.pef = 1;
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hpstate = 0;
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hpstateFields.red = 1;
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hpstateFields.hpriv = 1;
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hpstateFields.tlz = 0; // this is a guess
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hintp = 0; // no interrupts pending
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hstick_cmprFields.int_dis = 1; // disable timer compare interrupts
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hstick_cmprFields.tick_cmpr = 0; // Reset to 0 for pretty printing
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