Ruby: remove some unused stuff from SLICC files
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10 changed files with 5 additions and 133 deletions
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@ -28,7 +28,7 @@
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*/
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// Hack, no node object since base class has them
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NodeID id, no_chip_object="yes", no_vector="yes", abstract_chip_ptr="true";
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NodeID version, no_chip_object="yes", no_vector="yes", abstract_chip_ptr="true";
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MachineID machineID, no_chip_object="yes", no_vector="yes", abstract_chip_ptr="true";
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NodeID id;
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NodeID version;
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MachineID machineID;
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
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* Copyright (c) 1999-2012 Mark D. Hill and David A. Wood
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* Copyright (c) 2011 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -307,55 +307,6 @@ enumeration(MaskPredictorTraining, "MaskPredictorTraining_Undefined", desc="..."
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Both, desc="Both";
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}
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// Network Topologies
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enumeration(TopologyType, desc="...") {
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CROSSBAR, desc="One node per chip, single switch crossbar";
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HIERARCHICAL_SWITCH, desc="One node per chip, totally ordered hierarchical tree switched network";
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TORUS_2D, desc="One node per chip, 2D torus";
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PT_TO_PT, desc="One node per chip, Point to Point Network";
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FILE_SPECIFIED, desc="described by the file NETWORK_FILE";
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}
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// DNUCA AllocationStrategy
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enumeration(AllocationStrategy, desc="...") {
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InMiddle, desc="";
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InInvCorners, desc="";
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InSharedSides, desc="";
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StaticDist, desc="";
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RandomBank, desc="";
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FrequencyBank, desc="";
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FrequencyBlock, desc="";
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LRUBlock, desc="";
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}
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// DNUCA SearchMechanism
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enumeration(SearchMechanism, desc="...") {
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Perfect, desc="";
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PartialTag, desc="";
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BloomFilter, desc="";
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Random, desc="";
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None, desc="";
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}
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// DNUCA link type
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enumeration(LinkType, desc="...") {
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RC_1500UM, desc="";
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RC_2500UM, desc="";
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TL_9000UM, desc="";
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TL_11000UM, desc="";
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TL_13000UM, desc="";
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NO_ENERGY, desc="";
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NULL, desc="";
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}
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// transient request type
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enumeration(TransientRequestType, desc="...", default="TransientRequestType_Undefined") {
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Undefined, desc="";
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OffChip, desc="";
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OnChip, desc="";
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LocalTransient, desc="";
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}
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// Request Status
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enumeration(RequestStatus, desc="...", default="RequestStatus_NULL") {
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Ready, desc="The sequencer is ready and the request does not alias";
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@ -61,7 +61,4 @@ structure(MemoryMsg, desc="...", interface="Message") {
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PrefetchBit Prefetch, desc="Is this a prefetch request";
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bool ReadX, desc="Exclusive";
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int Acks, desc="How many acks to expect";
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}
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@ -29,16 +29,9 @@
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// Profiler function
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void profileStore(NodeID node, bool needCLB);
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void profileCacheCLBsize(int size, int numStaleI);
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void profileMemoryCLBsize(int size, int numStaleI);
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// used by 2level exclusive cache protocols
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void profile_miss(RubyRequest msg);
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// used by non-fast path protocols
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void profile_L1Cache_miss(RubyRequest msg, NodeID l1cacheID);
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// used by CMP protocols
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void profile_request(std::string L1CacheStateStr, std::string L2CacheStateStr,
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std::string directoryStateStr, std::string requestTypeStr);
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@ -55,10 +48,3 @@ void profile_average_latency_estimate(int latency);
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// profile the total message delay of a message across a virtual network
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void profileMsgDelay(int virtualNetwork, int delayCycles);
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// used by transactional-memory protocols
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void profile_transaction(int numStores);
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void profile_trans_wb();
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void profileOverflow(Address addr, MachineID mach);
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@ -36,22 +36,13 @@ Time get_time();
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Time zero_time();
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NodeID intToID(int nodenum);
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int IDToInt(NodeID id);
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int addressToInt(Address addr);
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bool multicast_retry();
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int numberOfNodes();
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int numberOfL1CachePerChip();
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int getAddThenMod(int addend1, int addend2, int modulus);
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int time_to_int(Time time);
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Time getTimeModInt(Time time, int modulus);
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Time getTimePlusInt(Time addend1, int addend2);
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Time getTimeMinusTime(Time t1, Time t2);
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Time getPreviousDelayedCycles(Time t1, Time t2);
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void procProfileCoherenceRequest(NodeID node, bool needCLB);
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void dirProfileCoherenceRequest(NodeID node, bool needCLB);
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bool isPerfectProtocol();
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bool L1trainsPrefetcher();
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int max_tokens();
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bool distributedPersistentEnabled();
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Address setOffset(Address addr, int offset);
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Address makeLineAddress(Address addr);
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int addressOffset(Address addr);
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@ -30,7 +30,6 @@
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#include "debug/RubyNetwork.hh"
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#include "mem/protocol/MachineType.hh"
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#include "mem/protocol/TopologyType.hh"
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#include "mem/ruby/common/NetDest.hh"
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#include "mem/ruby/network/BasicLink.hh"
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#include "mem/ruby/network/BasicRouter.hh"
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@ -31,7 +31,6 @@
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#include "base/cast.hh"
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#include "base/stl_helpers.hh"
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#include "mem/protocol/TopologyType.hh"
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#include "mem/ruby/buffers/MessageBuffer.hh"
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#include "mem/ruby/common/NetDest.hh"
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#include "mem/ruby/network/BasicLink.hh"
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@ -38,8 +38,6 @@
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#include "mem/ruby/common/Address.hh"
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#include "mem/packet.hh"
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typedef void* RubyPortHandle;
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class RubyRequest : public Message
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{
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public:
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@ -51,7 +51,6 @@ void profile_request(const std::string& L1CacheStateStr,
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const std::string& directoryStateStr,
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const std::string& requestTypeStr);
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void profile_miss(const RubyRequest& msg, NodeID id);
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void profile_L1Cache_miss(const RubyRequest& msg, NodeID id);
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void profile_token_retry(const Address& addr, AccessType type, int count);
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void profile_filter_action(int action);
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void profile_persistent_prediction(const Address& addr, AccessType type);
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@ -35,37 +35,17 @@
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#include <cassert>
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#include "mem/protocol/AccessType.hh"
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#include "mem/protocol/GenericRequestType.hh"
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#include "mem/protocol/MachineType.hh"
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#include "mem/protocol/MessageSizeType.hh"
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#include "mem/protocol/PrefetchBit.hh"
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#include "mem/ruby/common/Address.hh"
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#include "mem/ruby/common/Global.hh"
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#include "mem/ruby/network/Network.hh"
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#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
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#include "mem/ruby/system/MachineID.hh"
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#include "mem/ruby/system/System.hh"
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class Set;
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class NetDest;
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inline int
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random(int n)
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{
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return random() % n;
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}
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inline bool
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multicast_retry()
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{
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if (RubySystem::getRandomization()) {
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return (random() & 0x1);
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} else {
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return true;
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}
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}
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inline Time
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get_time()
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{
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@ -92,24 +72,6 @@ IDToInt(NodeID id)
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return nodenum;
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}
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inline int
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addressToInt(Address addr)
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{
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return (int)addr.getLineAddress();
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}
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inline bool
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long_enough_ago(Time event)
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{
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return ((get_time() - event) > 200);
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}
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inline int
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getAddThenMod(int addend1, int addend2, int modulus)
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{
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return (addend1 + addend2) % modulus;
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}
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inline Time
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getTimeModInt(Time time, int modulus)
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{
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@ -129,16 +91,6 @@ getTimeMinusTime(Time t1, Time t2)
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return t1 - t2;
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}
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inline Time
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getPreviousDelayedCycles(Time t1, Time t2)
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{
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if (RubySystem::getRandomization()) { // when randomizing delayed
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return 0;
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} else {
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return getTimeMinusTime(t1, t2);
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}
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}
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// Return type for time_to_int is "Time" and not "int" so we get a
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// 64-bit integer
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inline Time
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