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dev: Rename VirtIO PCI debug flag

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Rename VIOPci -> VIOIface to avoid having a separate flag for the MMIO
interface.

Change-Id: I99f9210fa36ce33662c48537fd3992cd9a69d349
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Rekai Gonzalez Alberquilla <rekai.gonzalezalberquilla@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2324
Reviewed-by: Weiping Liao <weipingliao@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
This commit is contained in:
Andreas Sandberg 2016-11-07 18:14:50 +00:00
parent 626a0cc003
commit cd9ca71b25
2 changed files with 19 additions and 19 deletions
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4
src/dev/virtio/SConscript
View file

@ -1,6 +1,6 @@
# -*- mode:python -*- # -*- mode:python -*-
# Copyright (c) 2014 ARM Limited # Copyright (c) 2014, 2016 ARM Limited
# All rights reserved. # All rights reserved.
# #
# The license below extends only to copyright in the software and shall # The license below extends only to copyright in the software and shall
@ -54,7 +54,7 @@ Source('block.cc')
Source('fs9p.cc') Source('fs9p.cc')
DebugFlag('VIO', 'VirtIO base functionality') DebugFlag('VIO', 'VirtIO base functionality')
DebugFlag('VIOPci', 'VirtIO PCI transport') DebugFlag('VIOIface', 'VirtIO transport')
DebugFlag('VIOConsole', 'VirtIO console device') DebugFlag('VIOConsole', 'VirtIO console device')
DebugFlag('VIOBlock', 'VirtIO block device') DebugFlag('VIOBlock', 'VirtIO block device')
DebugFlag('VIO9P', 'General 9p over VirtIO debugging') DebugFlag('VIO9P', 'General 9p over VirtIO debugging')

34
src/dev/virtio/pci.cc
View file

@ -39,7 +39,7 @@
#include "dev/virtio/pci.hh" #include "dev/virtio/pci.hh"
#include "debug/VIOPci.hh" #include "debug/VIOIface.hh"
#include "mem/packet_access.hh" #include "mem/packet_access.hh"
#include "params/PciVirtIO.hh" #include "params/PciVirtIO.hh"
@ -68,7 +68,7 @@ PciVirtIO::read(PacketPtr pkt)
panic("Invalid PCI memory access to unmapped memory.\n"); panic("Invalid PCI memory access to unmapped memory.\n");
assert(bar == 0); assert(bar == 0);
DPRINTF(VIOPci, "Reading offset 0x%x [len: %i]\n", offset, size); DPRINTF(VIOIface, "Reading offset 0x%x [len: %i]\n", offset, size);
// Forward device configuration writes to the device VirtIO model // Forward device configuration writes to the device VirtIO model
if (offset >= OFF_VIO_DEVICE) { if (offset >= OFF_VIO_DEVICE) {
@ -80,49 +80,49 @@ PciVirtIO::read(PacketPtr pkt)
switch(offset) { switch(offset) {
case OFF_DEVICE_FEATURES: case OFF_DEVICE_FEATURES:
DPRINTF(VIOPci, " DEVICE_FEATURES request\n"); DPRINTF(VIOIface, " DEVICE_FEATURES request\n");
assert(size == sizeof(uint32_t)); assert(size == sizeof(uint32_t));
pkt->set<uint32_t>(vio.deviceFeatures); pkt->set<uint32_t>(vio.deviceFeatures);
break; break;
case OFF_GUEST_FEATURES: case OFF_GUEST_FEATURES:
DPRINTF(VIOPci, " GUEST_FEATURES request\n"); DPRINTF(VIOIface, " GUEST_FEATURES request\n");
assert(size == sizeof(uint32_t)); assert(size == sizeof(uint32_t));
pkt->set<uint32_t>(vio.getGuestFeatures()); pkt->set<uint32_t>(vio.getGuestFeatures());
break; break;
case OFF_QUEUE_ADDRESS: case OFF_QUEUE_ADDRESS:
DPRINTF(VIOPci, " QUEUE_ADDRESS request\n"); DPRINTF(VIOIface, " QUEUE_ADDRESS request\n");
assert(size == sizeof(uint32_t)); assert(size == sizeof(uint32_t));
pkt->set<uint32_t>(vio.getQueueAddress()); pkt->set<uint32_t>(vio.getQueueAddress());
break; break;
case OFF_QUEUE_SIZE: case OFF_QUEUE_SIZE:
DPRINTF(VIOPci, " QUEUE_SIZE request\n"); DPRINTF(VIOIface, " QUEUE_SIZE request\n");
assert(size == sizeof(uint16_t)); assert(size == sizeof(uint16_t));
pkt->set<uint16_t>(vio.getQueueSize()); pkt->set<uint16_t>(vio.getQueueSize());
break; break;
case OFF_QUEUE_SELECT: case OFF_QUEUE_SELECT:
DPRINTF(VIOPci, " QUEUE_SELECT\n"); DPRINTF(VIOIface, " QUEUE_SELECT\n");
assert(size == sizeof(uint16_t)); assert(size == sizeof(uint16_t));
pkt->set<uint16_t>(vio.getQueueSelect()); pkt->set<uint16_t>(vio.getQueueSelect());
break; break;
case OFF_QUEUE_NOTIFY: case OFF_QUEUE_NOTIFY:
DPRINTF(VIOPci, " QUEUE_NOTIFY request\n"); DPRINTF(VIOIface, " QUEUE_NOTIFY request\n");
assert(size == sizeof(uint16_t)); assert(size == sizeof(uint16_t));
pkt->set<uint16_t>(queueNotify); pkt->set<uint16_t>(queueNotify);
break; break;
case OFF_DEVICE_STATUS: case OFF_DEVICE_STATUS:
DPRINTF(VIOPci, " DEVICE_STATUS request\n"); DPRINTF(VIOIface, " DEVICE_STATUS request\n");
assert(size == sizeof(uint8_t)); assert(size == sizeof(uint8_t));
pkt->set<uint8_t>(vio.getDeviceStatus()); pkt->set<uint8_t>(vio.getDeviceStatus());
break; break;
case OFF_ISR_STATUS: { case OFF_ISR_STATUS: {
DPRINTF(VIOPci, " ISR_STATUS\n"); DPRINTF(VIOIface, " ISR_STATUS\n");
assert(size == sizeof(uint8_t)); assert(size == sizeof(uint8_t));
const uint8_t isr_status(interruptDeliveryPending ? 1 : 0); const uint8_t isr_status(interruptDeliveryPending ? 1 : 0);
if (interruptDeliveryPending) { if (interruptDeliveryPending) {
@ -149,7 +149,7 @@ PciVirtIO::write(PacketPtr pkt)
panic("Invalid PCI memory access to unmapped memory.\n"); panic("Invalid PCI memory access to unmapped memory.\n");
assert(bar == 0); assert(bar == 0);
DPRINTF(VIOPci, "Writing offset 0x%x [len: %i]\n", offset, size); DPRINTF(VIOIface, "Writing offset 0x%x [len: %i]\n", offset, size);
// Forward device configuration writes to the device VirtIO model // Forward device configuration writes to the device VirtIO model
if (offset >= OFF_VIO_DEVICE) { if (offset >= OFF_VIO_DEVICE) {
@ -165,13 +165,13 @@ PciVirtIO::write(PacketPtr pkt)
break; break;
case OFF_GUEST_FEATURES: case OFF_GUEST_FEATURES:
DPRINTF(VIOPci, " WRITE GUEST_FEATURES request\n"); DPRINTF(VIOIface, " WRITE GUEST_FEATURES request\n");
assert(size == sizeof(uint32_t)); assert(size == sizeof(uint32_t));
vio.setGuestFeatures(pkt->get<uint32_t>()); vio.setGuestFeatures(pkt->get<uint32_t>());
break; break;
case OFF_QUEUE_ADDRESS: case OFF_QUEUE_ADDRESS:
DPRINTF(VIOPci, " WRITE QUEUE_ADDRESS\n"); DPRINTF(VIOIface, " WRITE QUEUE_ADDRESS\n");
assert(size == sizeof(uint32_t)); assert(size == sizeof(uint32_t));
vio.setQueueAddress(pkt->get<uint32_t>()); vio.setQueueAddress(pkt->get<uint32_t>());
break; break;
@ -181,13 +181,13 @@ PciVirtIO::write(PacketPtr pkt)
break; break;
case OFF_QUEUE_SELECT: case OFF_QUEUE_SELECT:
DPRINTF(VIOPci, " WRITE QUEUE_SELECT\n"); DPRINTF(VIOIface, " WRITE QUEUE_SELECT\n");
assert(size == sizeof(uint16_t)); assert(size == sizeof(uint16_t));
vio.setQueueSelect(pkt->get<uint16_t>()); vio.setQueueSelect(pkt->get<uint16_t>());
break; break;
case OFF_QUEUE_NOTIFY: case OFF_QUEUE_NOTIFY:
DPRINTF(VIOPci, " WRITE QUEUE_NOTIFY\n"); DPRINTF(VIOIface, " WRITE QUEUE_NOTIFY\n");
assert(size == sizeof(uint16_t)); assert(size == sizeof(uint16_t));
queueNotify = pkt->get<uint16_t>(); queueNotify = pkt->get<uint16_t>();
vio.onNotify(queueNotify); vio.onNotify(queueNotify);
@ -196,7 +196,7 @@ PciVirtIO::write(PacketPtr pkt)
case OFF_DEVICE_STATUS: { case OFF_DEVICE_STATUS: {
assert(size == sizeof(uint8_t)); assert(size == sizeof(uint8_t));
uint8_t status(pkt->get<uint8_t>()); uint8_t status(pkt->get<uint8_t>());
DPRINTF(VIOPci, "VirtIO set status: 0x%x\n", status); DPRINTF(VIOIface, "VirtIO set status: 0x%x\n", status);
vio.setDeviceStatus(status); vio.setDeviceStatus(status);
} break; } break;
@ -214,7 +214,7 @@ PciVirtIO::write(PacketPtr pkt)
void void
PciVirtIO::kick() PciVirtIO::kick()
{ {
DPRINTF(VIOPci, "kick(): Sending interrupt...\n"); DPRINTF(VIOIface, "kick(): Sending interrupt...\n");
interruptDeliveryPending = true; interruptDeliveryPending = true;
intrPost(); intrPost();
} }