dev: Rename VirtIO PCI debug flag
Rename VIOPci -> VIOIface to avoid having a separate flag for the MMIO interface. Change-Id: I99f9210fa36ce33662c48537fd3992cd9a69d349 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sudhanshu Jha <sudhanshu.jha@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Rekai Gonzalez Alberquilla <rekai.gonzalezalberquilla@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2324 Reviewed-by: Weiping Liao <weipingliao@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
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2 changed files with 19 additions and 19 deletions
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@ -1,6 +1,6 @@
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# -*- mode:python -*-
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# Copyright (c) 2014 ARM Limited
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# Copyright (c) 2014, 2016 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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@ -54,7 +54,7 @@ Source('block.cc')
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Source('fs9p.cc')
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DebugFlag('VIO', 'VirtIO base functionality')
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DebugFlag('VIOPci', 'VirtIO PCI transport')
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DebugFlag('VIOIface', 'VirtIO transport')
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DebugFlag('VIOConsole', 'VirtIO console device')
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DebugFlag('VIOBlock', 'VirtIO block device')
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DebugFlag('VIO9P', 'General 9p over VirtIO debugging')
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@ -39,7 +39,7 @@
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#include "dev/virtio/pci.hh"
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#include "debug/VIOPci.hh"
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#include "debug/VIOIface.hh"
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#include "mem/packet_access.hh"
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#include "params/PciVirtIO.hh"
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@ -68,7 +68,7 @@ PciVirtIO::read(PacketPtr pkt)
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panic("Invalid PCI memory access to unmapped memory.\n");
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assert(bar == 0);
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DPRINTF(VIOPci, "Reading offset 0x%x [len: %i]\n", offset, size);
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DPRINTF(VIOIface, "Reading offset 0x%x [len: %i]\n", offset, size);
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// Forward device configuration writes to the device VirtIO model
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if (offset >= OFF_VIO_DEVICE) {
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@ -80,49 +80,49 @@ PciVirtIO::read(PacketPtr pkt)
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switch(offset) {
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case OFF_DEVICE_FEATURES:
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DPRINTF(VIOPci, " DEVICE_FEATURES request\n");
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DPRINTF(VIOIface, " DEVICE_FEATURES request\n");
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assert(size == sizeof(uint32_t));
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pkt->set<uint32_t>(vio.deviceFeatures);
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break;
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case OFF_GUEST_FEATURES:
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DPRINTF(VIOPci, " GUEST_FEATURES request\n");
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DPRINTF(VIOIface, " GUEST_FEATURES request\n");
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assert(size == sizeof(uint32_t));
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pkt->set<uint32_t>(vio.getGuestFeatures());
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break;
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case OFF_QUEUE_ADDRESS:
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DPRINTF(VIOPci, " QUEUE_ADDRESS request\n");
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DPRINTF(VIOIface, " QUEUE_ADDRESS request\n");
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assert(size == sizeof(uint32_t));
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pkt->set<uint32_t>(vio.getQueueAddress());
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break;
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case OFF_QUEUE_SIZE:
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DPRINTF(VIOPci, " QUEUE_SIZE request\n");
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DPRINTF(VIOIface, " QUEUE_SIZE request\n");
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assert(size == sizeof(uint16_t));
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pkt->set<uint16_t>(vio.getQueueSize());
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break;
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case OFF_QUEUE_SELECT:
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DPRINTF(VIOPci, " QUEUE_SELECT\n");
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DPRINTF(VIOIface, " QUEUE_SELECT\n");
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assert(size == sizeof(uint16_t));
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pkt->set<uint16_t>(vio.getQueueSelect());
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break;
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case OFF_QUEUE_NOTIFY:
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DPRINTF(VIOPci, " QUEUE_NOTIFY request\n");
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DPRINTF(VIOIface, " QUEUE_NOTIFY request\n");
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assert(size == sizeof(uint16_t));
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pkt->set<uint16_t>(queueNotify);
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break;
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case OFF_DEVICE_STATUS:
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DPRINTF(VIOPci, " DEVICE_STATUS request\n");
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DPRINTF(VIOIface, " DEVICE_STATUS request\n");
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assert(size == sizeof(uint8_t));
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pkt->set<uint8_t>(vio.getDeviceStatus());
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break;
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case OFF_ISR_STATUS: {
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DPRINTF(VIOPci, " ISR_STATUS\n");
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DPRINTF(VIOIface, " ISR_STATUS\n");
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assert(size == sizeof(uint8_t));
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const uint8_t isr_status(interruptDeliveryPending ? 1 : 0);
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if (interruptDeliveryPending) {
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@ -149,7 +149,7 @@ PciVirtIO::write(PacketPtr pkt)
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panic("Invalid PCI memory access to unmapped memory.\n");
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assert(bar == 0);
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DPRINTF(VIOPci, "Writing offset 0x%x [len: %i]\n", offset, size);
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DPRINTF(VIOIface, "Writing offset 0x%x [len: %i]\n", offset, size);
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// Forward device configuration writes to the device VirtIO model
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if (offset >= OFF_VIO_DEVICE) {
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@ -165,13 +165,13 @@ PciVirtIO::write(PacketPtr pkt)
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break;
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case OFF_GUEST_FEATURES:
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DPRINTF(VIOPci, " WRITE GUEST_FEATURES request\n");
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DPRINTF(VIOIface, " WRITE GUEST_FEATURES request\n");
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assert(size == sizeof(uint32_t));
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vio.setGuestFeatures(pkt->get<uint32_t>());
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break;
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case OFF_QUEUE_ADDRESS:
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DPRINTF(VIOPci, " WRITE QUEUE_ADDRESS\n");
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DPRINTF(VIOIface, " WRITE QUEUE_ADDRESS\n");
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assert(size == sizeof(uint32_t));
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vio.setQueueAddress(pkt->get<uint32_t>());
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break;
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@ -181,13 +181,13 @@ PciVirtIO::write(PacketPtr pkt)
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break;
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case OFF_QUEUE_SELECT:
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DPRINTF(VIOPci, " WRITE QUEUE_SELECT\n");
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DPRINTF(VIOIface, " WRITE QUEUE_SELECT\n");
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assert(size == sizeof(uint16_t));
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vio.setQueueSelect(pkt->get<uint16_t>());
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break;
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case OFF_QUEUE_NOTIFY:
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DPRINTF(VIOPci, " WRITE QUEUE_NOTIFY\n");
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DPRINTF(VIOIface, " WRITE QUEUE_NOTIFY\n");
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assert(size == sizeof(uint16_t));
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queueNotify = pkt->get<uint16_t>();
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vio.onNotify(queueNotify);
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@ -196,7 +196,7 @@ PciVirtIO::write(PacketPtr pkt)
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case OFF_DEVICE_STATUS: {
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assert(size == sizeof(uint8_t));
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uint8_t status(pkt->get<uint8_t>());
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DPRINTF(VIOPci, "VirtIO set status: 0x%x\n", status);
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DPRINTF(VIOIface, "VirtIO set status: 0x%x\n", status);
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vio.setDeviceStatus(status);
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} break;
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@ -214,7 +214,7 @@ PciVirtIO::write(PacketPtr pkt)
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void
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PciVirtIO::kick()
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{
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DPRINTF(VIOPci, "kick(): Sending interrupt...\n");
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DPRINTF(VIOIface, "kick(): Sending interrupt...\n");
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interruptDeliveryPending = true;
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intrPost();
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}
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