base: Add XOR-based hashed address interleaving
This patch extends the current address interleaving with basic hashing support. Instead of directly comparing a number of address bits with a matching value, it is now possible to use two independent set of address bits XOR'ed together. This avoids issues where strided address patterns are heavily biased to a subset of the interleaved ranges.
This commit is contained in:
Andreas Hansson
parent
5ea60a95b3
commit
ccb512ecc1
2 changed files with 100 additions and 25 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2012 ARM Limited
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* Copyright (c) 2012, 2014 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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@ -53,6 +53,22 @@
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#include "base/misc.hh"
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#include "base/types.hh"
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/**
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* The AddrRange class encapsulates an address range, and supports a
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* number of tests to check if two ranges intersect, if a range
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* contains a specific address etc. Besides a basic range, the
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* AddrRange also support interleaved ranges, to stripe across cache
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* banks, or memory controllers. The interleaving is implemented by
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* allowing a number of bits of the address, at an arbitrary bit
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* position, to be used as interleaving bits with an associated
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* matching value. In addition, to prevent uniformly strided address
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* patterns from a very biased interleaving, we also allow basic
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* XOR-based hashing by specifying an additional set of bits to XOR
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* with before matching.
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*
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* The AddrRange is also able to coalesce a number of interleaved
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* ranges to a contiguous range.
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*/
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class AddrRange
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{
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@ -66,6 +82,10 @@ class AddrRange
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/// The high bit of the slice that is used for interleaving
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uint8_t intlvHighBit;
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/// The high bit of the slice used to XOR hash the value we match
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/// against, set to 0 to disable.
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uint8_t xorHighBit;
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/// The number of bits used for interleaving, set to 0 to disable
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uint8_t intlvBits;
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@ -76,18 +96,42 @@ class AddrRange
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public:
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AddrRange()
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: _start(1), _end(0), intlvHighBit(0), intlvBits(0), intlvMatch(0)
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: _start(1), _end(0), intlvHighBit(0), xorHighBit(0), intlvBits(0),
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intlvMatch(0)
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{}
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AddrRange(Addr _start, Addr _end, uint8_t _intlv_high_bit,
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uint8_t _intlv_bits, uint8_t _intlv_match)
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uint8_t _xor_high_bit, uint8_t _intlv_bits,
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uint8_t _intlv_match)
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: _start(_start), _end(_end), intlvHighBit(_intlv_high_bit),
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intlvBits(_intlv_bits), intlvMatch(_intlv_match)
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{}
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xorHighBit(_xor_high_bit), intlvBits(_intlv_bits),
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intlvMatch(_intlv_match)
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{
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// sanity checks
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fatal_if(intlvBits && intlvMatch >= ULL(1) << intlvBits,
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"Match value %d does not fit in %d interleaving bits\n",
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intlvMatch, intlvBits);
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// ignore the XOR bits if not interleaving
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if (intlvBits && xorHighBit) {
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if (xorHighBit == intlvHighBit) {
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fatal("XOR and interleave high bit must be different\n");
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} else if (xorHighBit > intlvHighBit) {
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if ((xorHighBit - intlvHighBit) < intlvBits)
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fatal("XOR and interleave high bit must be at least "
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"%d bits apart\n", intlvBits);
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} else {
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if ((intlvHighBit - xorHighBit) < intlvBits) {
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fatal("Interleave and XOR high bit must be at least "
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"%d bits apart\n", intlvBits);
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}
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}
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}
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}
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AddrRange(Addr _start, Addr _end)
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: _start(_start), _end(_end), intlvHighBit(0), intlvBits(0),
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intlvMatch(0)
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: _start(_start), _end(_end), intlvHighBit(0), xorHighBit(0),
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intlvBits(0), intlvMatch(0)
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{}
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/**
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@ -97,13 +141,15 @@ class AddrRange
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* @param ranges Interleaved ranges to be merged
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*/
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AddrRange(const std::vector<AddrRange>& ranges)
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: _start(1), _end(0), intlvHighBit(0), intlvBits(0), intlvMatch(0)
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: _start(1), _end(0), intlvHighBit(0), xorHighBit(0), intlvBits(0),
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intlvMatch(0)
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{
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if (!ranges.empty()) {
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// get the values from the first one and check the others
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_start = ranges.front()._start;
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_end = ranges.front()._end;
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intlvHighBit = ranges.front().intlvHighBit;
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xorHighBit = ranges.front().xorHighBit;
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intlvBits = ranges.front().intlvBits;
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if (ranges.size() != (ULL(1) << intlvBits))
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@ -111,21 +157,21 @@ class AddrRange
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ranges.size(), intlvBits);
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uint8_t match = 0;
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for (std::vector<AddrRange>::const_iterator r = ranges.begin();
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r != ranges.end(); ++r) {
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if (!mergesWith(*r))
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for (const auto& r : ranges) {
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if (!mergesWith(r))
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fatal("Can only merge ranges with the same start, end "
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"and interleaving bits\n");
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if (r->intlvMatch != match)
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if (r.intlvMatch != match)
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fatal("Expected interleave match %d but got %d when "
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"merging\n", match, r->intlvMatch);
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"merging\n", match, r.intlvMatch);
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++match;
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}
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// our range is complete and we can turn this into a
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// non-interleaved range
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intlvHighBit = 0;
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xorHighBit = 0;
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intlvBits = 0;
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}
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}
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@ -137,6 +183,11 @@ class AddrRange
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*/
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bool interleaved() const { return intlvBits != 0; }
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/**
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* Determine if the range interleaving is hashed or not.
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*/
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bool hashed() const { return interleaved() && xorHighBit != 0; }
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/**
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* Determing the interleaving granularity of the range.
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*
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@ -182,12 +233,22 @@ class AddrRange
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*/
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std::string to_string() const
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{
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if (interleaved())
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return csprintf("[%#llx : %#llx], [%d : %d] = %d", _start, _end,
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intlvHighBit, intlvHighBit - intlvBits + 1,
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intlvMatch);
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else
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if (interleaved()) {
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if (hashed()) {
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return csprintf("[%#llx : %#llx], [%d : %d] XOR [%d : %d] = %d",
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_start, _end,
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intlvHighBit, intlvHighBit - intlvBits + 1,
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xorHighBit, xorHighBit - intlvBits + 1,
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intlvMatch);
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} else {
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return csprintf("[%#llx : %#llx], [%d : %d] = %d",
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_start, _end,
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intlvHighBit, intlvHighBit - intlvBits + 1,
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intlvMatch);
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}
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} else {
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return csprintf("[%#llx : %#llx]", _start, _end);
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}
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}
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/**
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@ -202,6 +263,7 @@ class AddrRange
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{
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return r._start == _start && r._end == _end &&
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r.intlvHighBit == intlvHighBit &&
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r.xorHighBit == xorHighBit &&
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r.intlvBits == intlvBits;
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}
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@ -263,10 +325,20 @@ class AddrRange
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// check if the address is in the range and if there is either
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// no interleaving, or with interleaving also if the selected
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// bits from the address match the interleaving value
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return a >= _start && a <= _end &&
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(!interleaved() ||
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(bits(a, intlvHighBit, intlvHighBit - intlvBits + 1) ==
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intlvMatch));
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bool in_range = a >= _start && a <= _end;
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if (!interleaved()) {
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return in_range;
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} else if (in_range) {
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if (!hashed()) {
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return bits(a, intlvHighBit, intlvHighBit - intlvBits + 1) ==
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intlvMatch;
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} else {
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return (bits(a, intlvHighBit, intlvHighBit - intlvBits + 1) ^
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bits(a, xorHighBit, xorHighBit - intlvBits + 1)) ==
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intlvMatch;
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}
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}
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return false;
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}
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/**
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@ -726,8 +726,9 @@ class AddrRange(ParamValue):
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cxx_type = 'AddrRange'
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def __init__(self, *args, **kwargs):
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# Disable interleaving by default
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# Disable interleaving and hashing by default
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self.intlvHighBit = 0
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self.xorHighBit = 0
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self.intlvBits = 0
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self.intlvMatch = 0
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@ -745,6 +746,8 @@ class AddrRange(ParamValue):
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# Now on to the optional bit
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if 'intlvHighBit' in kwargs:
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self.intlvHighBit = int(kwargs.pop('intlvHighBit'))
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if 'xorHighBit' in kwargs:
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self.xorHighBit = int(kwargs.pop('xorHighBit'))
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if 'intlvBits' in kwargs:
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self.intlvBits = int(kwargs.pop('intlvBits'))
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if 'intlvMatch' in kwargs:
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@ -814,8 +817,8 @@ class AddrRange(ParamValue):
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from m5.internal.range import AddrRange
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return AddrRange(long(self.start), long(self.end),
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int(self.intlvHighBit), int(self.intlvBits),
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int(self.intlvMatch))
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int(self.intlvHighBit), int(self.xorHighBit),
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int(self.intlvBits), int(self.intlvMatch))
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# Boolean parameter type. Python doesn't let you subclass bool, since
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# it doesn't want to let you create multiple instances of True and
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