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Changed the integer register file to work with flattened indices.

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--HG--
extra : convert_revision : c5153c3c712e5d18b5233e1fd205806adcb30654
This commit is contained in:
Gabe Black 2006-12-06 05:42:09 -05:00
parent 4d8a0541dd
commit c541be3a48
2 changed files with 17 additions and 2 deletions
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9
src/arch/sparc/intregfile.cc
View file

@ -66,6 +66,7 @@ void IntRegFile::clear()
memset(regGlobals[x], 0, sizeof(IntReg) * RegsPerFrame); memset(regGlobals[x], 0, sizeof(IntReg) * RegsPerFrame);
for(int x = 0; x < 2 * NWindows; x++) for(int x = 0; x < 2 * NWindows; x++)
memset(regSegments[x], 0, sizeof(IntReg) * RegsPerFrame); memset(regSegments[x], 0, sizeof(IntReg) * RegsPerFrame);
memset(regs, 0, sizeof(IntReg) * NumIntRegs);
} }
IntRegFile::IntRegFile() IntRegFile::IntRegFile()
@ -78,6 +79,8 @@ IntRegFile::IntRegFile()
IntReg IntRegFile::readReg(int intReg) IntReg IntRegFile::readReg(int intReg)
{ {
DPRINTF(Sparc, "Read register %d = 0x%x\n", intReg, regs[intReg]);
return regs[intReg];
IntReg val; IntReg val;
if(intReg < NumIntArchRegs) if(intReg < NumIntArchRegs)
val = regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask]; val = regView[intReg >> FrameOffsetBits][intReg & FrameOffsetMask];
@ -93,6 +96,12 @@ IntReg IntRegFile::readReg(int intReg)
void IntRegFile::setReg(int intReg, const IntReg &val) void IntRegFile::setReg(int intReg, const IntReg &val)
{ {
if(intReg)
{
DPRINTF(Sparc, "Wrote register %d = 0x%x\n", intReg, val);
regs[intReg] = val;
}
return;
if(intReg) if(intReg)
{ {
DPRINTF(Sparc, "Wrote register %d = 0x%x\n", intReg, val); DPRINTF(Sparc, "Wrote register %d = 0x%x\n", intReg, val);

10
src/arch/sparc/intregfile.hh
View file

@ -34,6 +34,7 @@
#include "arch/sparc/isa_traits.hh" #include "arch/sparc/isa_traits.hh"
#include "arch/sparc/types.hh" #include "arch/sparc/types.hh"
#include "base/bitfield.hh"
#include <string> #include <string>
@ -54,15 +55,19 @@ namespace SparcISA
private: private:
friend class RegFile; friend class RegFile;
protected: protected:
//The number of bits needed to index into each 8 register frame
static const int FrameOffsetBits = 3; static const int FrameOffsetBits = 3;
//The number of bits to choose between the 4 sets of 8 registers
static const int FrameNumBits = 2; static const int FrameNumBits = 2;
//The number of registers per "frame" (8)
static const int RegsPerFrame = 1 << FrameOffsetBits; static const int RegsPerFrame = 1 << FrameOffsetBits;
static const int FrameNumMask = //A mask to get the frame number
static const uint64_t FrameNumMask =
(FrameNumBits == sizeof(int)) ? (FrameNumBits == sizeof(int)) ?
(unsigned int)(-1) : (unsigned int)(-1) :
(1 << FrameNumBits) - 1; (1 << FrameNumBits) - 1;
static const int FrameOffsetMask = static const uint64_t FrameOffsetMask =
(FrameOffsetBits == sizeof(int)) ? (FrameOffsetBits == sizeof(int)) ?
(unsigned int)(-1) : (unsigned int)(-1) :
(1 << FrameOffsetBits) - 1; (1 << FrameOffsetBits) - 1;
@ -70,6 +75,7 @@ namespace SparcISA
IntReg regGlobals[MaxGL][RegsPerFrame]; IntReg regGlobals[MaxGL][RegsPerFrame];
IntReg regSegments[2 * NWindows][RegsPerFrame]; IntReg regSegments[2 * NWindows][RegsPerFrame];
IntReg microRegs[NumMicroIntRegs]; IntReg microRegs[NumMicroIntRegs];
IntReg regs[NumIntRegs];
enum regFrame {Globals, Outputs, Locals, Inputs, NumFrames}; enum regFrame {Globals, Outputs, Locals, Inputs, NumFrames};