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X86: Actually use the extra vector bits we get from ICW2.

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This commit is contained in:
Gabe Black 2008-10-12 13:51:48 -07:00
parent ec9d3aad71
commit c35da8e495
2 changed files with 6 additions and 2 deletions
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3
src/dev/x86/i8259.cc
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@ -128,8 +128,9 @@ X86ISA::I8259::write(PacketPtr pkt)
break; break;
case 0x1: case 0x1:
DPRINTF(I8259, "Received initialization command word 2.\n"); DPRINTF(I8259, "Received initialization command word 2.\n");
vectorOffset = val & ~mask(3);
DPRINTF(I8259, "Responsible for vectors %#x-%#x.\n", DPRINTF(I8259, "Responsible for vectors %#x-%#x.\n",
val & ~mask(3), val | mask(3)); vectorOffset, vectorOffset | mask(3));
if (cascadeMode) { if (cascadeMode) {
initControlWord++; initControlWord++;
} else { } else {

5
src/dev/x86/i8259.hh
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@ -53,6 +53,9 @@ class I8259 : public BasicPioDevice, public IntDev
// Interrupt Mask Register // Interrupt Mask Register
uint8_t IMR; uint8_t IMR;
// The higher order bits of the vector to return
uint8_t vectorOffset;
bool cascadeMode; bool cascadeMode;
// A bit vector of lines with slaves attached, or the slave id, depending // A bit vector of lines with slaves attached, or the slave id, depending
// on if this is a master or slave PIC. // on if this is a master or slave PIC.
@ -77,7 +80,7 @@ class I8259 : public BasicPioDevice, public IntDev
I8259(Params * p) : BasicPioDevice(p), IntDev(this), I8259(Params * p) : BasicPioDevice(p), IntDev(this),
latency(p->pio_latency), output(p->output), latency(p->pio_latency), output(p->output),
mode(p->mode), IRR(0), ISR(0), IMR(0), mode(p->mode), IRR(0), ISR(0), IMR(0),
readIRR(true), initControlWord(0) vectorOffset(0), readIRR(true), initControlWord(0)
{ {
pioSize = 2; pioSize = 2;
} }