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arm: Fix secure state checking in various places

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Faults that could potentially be routed to the hypervisor checked
whether or not they were in a secure state without checking if security
was enabled or not. This caused faults not to be routed correctly. This
patch causes secure state checking to first ask if security is enabled.

Change-Id: I179e9b181b27f552734c9bab2b18d05ac579a119
This commit is contained in:
Dylan Johnson 2016-08-02 10:38:02 +01:00
parent 996c1ed33c
commit c2271e301d
3 changed files with 11 additions and 14 deletions
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13
src/arch/arm/faults.cc
View file

@ -1116,7 +1116,7 @@ PrefetchAbort::routeToHyp(ThreadContext *tc) const
toHyp |= (stage2 ||
( (source == DebugEvent) && hdcr.tde && (cpsr.mode != MODE_HYP)) ||
( (source == SynchronousExternalAbort) && hcr.tge && (cpsr.mode == MODE_USER))
) && !inSecureState(scr, cpsr);
) && !inSecureState(tc);
return toHyp;
}
@ -1182,7 +1182,7 @@ DataAbort::routeToHyp(ThreadContext *tc) const
((source == AlignmentFault) ||
(source == SynchronousExternalAbort))
)
) && !inSecureState(scr, cpsr);
) && !inSecureState(tc);
return toHyp;
}
@ -1272,7 +1272,7 @@ Interrupt::routeToHyp(ThreadContext *tc) const
HCR hcr = tc->readMiscRegNoEffect(MISCREG_HCR);
CPSR cpsr = tc->readMiscRegNoEffect(MISCREG_CPSR);
// Determine whether IRQs are routed to Hyp mode.
toHyp = (!scr.irq && hcr.imo && !inSecureState(scr, cpsr)) ||
toHyp = (!scr.irq && hcr.imo && !inSecureState(tc)) ||
(cpsr.mode == MODE_HYP);
return toHyp;
}
@ -1311,7 +1311,7 @@ FastInterrupt::routeToHyp(ThreadContext *tc) const
HCR hcr = tc->readMiscRegNoEffect(MISCREG_HCR);
CPSR cpsr = tc->readMiscRegNoEffect(MISCREG_CPSR);
// Determine whether IRQs are routed to Hyp mode.
toHyp = (!scr.fiq && hcr.fmo && !inSecureState(scr, cpsr)) ||
toHyp = (!scr.fiq && hcr.fmo && !inSecureState(tc)) ||
(cpsr.mode == MODE_HYP);
return toHyp;
}
@ -1380,10 +1380,9 @@ SystemError::routeToHyp(ThreadContext *tc) const
SCR scr = tc->readMiscRegNoEffect(MISCREG_SCR_EL3);
HCR hcr = tc->readMiscRegNoEffect(MISCREG_HCR);
CPSR cpsr = tc->readMiscRegNoEffect(MISCREG_CPSR);
toHyp = (!scr.ea && hcr.amo && !inSecureState(scr, cpsr)) ||
(!scr.ea && !scr.rw && !hcr.amo && !inSecureState(scr,cpsr));
toHyp = (!scr.ea && hcr.amo && !inSecureState(tc)) ||
(!scr.ea && !scr.rw && !hcr.amo && !inSecureState(tc));
return toHyp;
}

4
src/arch/arm/interrupts.cc
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2009, 2012-2013 ARM Limited
* Copyright (c) 2009, 2012-2013, 2016 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
@ -65,7 +65,7 @@ ArmISA::Interrupts::takeInt(ThreadContext *tc, InterruptTypes int_type) const
else
scr = tc->readMiscReg(MISCREG_SCR_EL3);
bool is_secure = inSecureState(scr, cpsr);
bool is_secure = inSecureState(tc);
switch(int_type) {
case INT_FIQ:

8
src/arch/arm/interrupts.hh
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010, 2012-2013 ARM Limited
* Copyright (c) 2010, 2012-2013, 2016 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@ -141,10 +141,9 @@ class Interrupts : public SimObject
return false;
CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
SCR scr = tc->readMiscReg(MISCREG_SCR);
bool isHypMode = cpsr.mode == MODE_HYP;
bool isSecure = inSecureState(scr, cpsr);
bool isSecure = inSecureState(tc);
bool allowVIrq = !cpsr.i && hcr.imo && !isSecure && !isHypMode;
bool allowVFiq = !cpsr.f && hcr.fmo && !isSecure && !isHypMode;
bool allowVAbort = !cpsr.a && hcr.amo && !isSecure && !isHypMode;
@ -229,13 +228,12 @@ class Interrupts : public SimObject
HCR hcr = tc->readMiscReg(MISCREG_HCR);
CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
SCR scr = tc->readMiscReg(MISCREG_SCR);
// Calculate a few temp vars so we can work out if there's a pending
// virtual interrupt, and if its allowed to happen
// ARM ARM Issue C section B1.9.9, B1.9.11, and B1.9.13
bool isHypMode = cpsr.mode == MODE_HYP;
bool isSecure = inSecureState(scr, cpsr);
bool isSecure = inSecureState(tc);
bool allowVIrq = !cpsr.i && hcr.imo && !isSecure && !isHypMode;
bool allowVFiq = !cpsr.f && hcr.fmo && !isSecure && !isHypMode;
bool allowVAbort = !cpsr.a && hcr.amo && !isSecure && !isHypMode;