diff --git a/SConscript b/SConscript
index 6fe99b314..444f71afe 100644
--- a/SConscript
+++ b/SConscript
@@ -164,7 +164,10 @@ base_sources = Split('''
 	mem/cache/miss/miss_queue.cc
 	mem/cache/miss/mshr.cc
 	mem/cache/miss/mshr_queue.cc
-        mem/cache/miss/prefetcher.cc
+        mem/cache/prefetch/base_prefetcher.cc
+        mem/cache/prefetch/prefetcher.cc
+        mem/cache/prefetch/stride_prefetcher.cc
+        mem/cache/prefetch/tagged_prefetcher.cc
 	mem/cache/tags/base_tags.cc
 	mem/cache/tags/cache_tags.cc
 	mem/cache/tags/fa_lru.cc
diff --git a/objects/BaseCache.mpy b/objects/BaseCache.mpy
index 314a4efda..cb3e56de6 100644
--- a/objects/BaseCache.mpy
+++ b/objects/BaseCache.mpy
@@ -36,7 +36,12 @@ simobj BaseCache(BaseMem):
     two_queue = Param.Bool(False,
         "whether the lifo should have two queue replacement")
     write_buffers = Param.Int(8, "number of write buffers")
-    use_prefetcher = Param.Bool(False,
-         "wheter you are using the hardware prefetcher")
+    prefetch_miss = Param.Bool(False,
+         "wheter you are using the hardware prefetcher from Miss stream")
+    prefetch_access = Param.Bool(False,
+         "wheter you are using the hardware prefetcher from Access stream")
     prefetcher_size = Param.Int(100,
          "Number of entries in the harware prefetch queue")
+    prefetch_past_page = Param.Bool(False,
+         "Allow prefetches to cross virtual page boundaries")
+