sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

config: Add whole line accesses to improve memchecker's coverage

Browse source 
Change-Id: Ie1a047139e350ce7400f3a20be644eaff1e21428
Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
This commit is contained in:
Nikos Nikoleris 2016-12-05 16:48:30 -05:00
parent 0054f1ad53
commit c1a40f9e44
1 changed files with 3 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
configs/example/memcheck.py
View file

@ -1,4 +1,4 @@
# Copyright (c) 2015 ARM Limited # Copyright (c) 2015-2016 ARM Limited
# All rights reserved. # All rights reserved.
# #
# The license below extends only to copyright in the software and shall # The license below extends only to copyright in the software and shall
@ -188,9 +188,9 @@ cfg_file = open(cfg_file_name, 'w')
# Three states, with random, linear and idle behaviours. The random # Three states, with random, linear and idle behaviours. The random
# and linear states access memory in the range [0 : 16 Mbyte] with 8 # and linear states access memory in the range [0 : 16 Mbyte] with 8
# byte accesses. # byte and 64 byte accesses respectively.
cfg_file.write("STATE 0 10000000 RANDOM 65 0 16777216 8 50000 150000 0\n") cfg_file.write("STATE 0 10000000 RANDOM 65 0 16777216 8 50000 150000 0\n")
cfg_file.write("STATE 1 10000000 LINEAR 65 0 16777216 8 50000 150000 0\n") cfg_file.write("STATE 1 10000000 LINEAR 65 0 16777216 64 50000 150000 0\n")
cfg_file.write("STATE 2 10000000 IDLE\n") cfg_file.write("STATE 2 10000000 IDLE\n")
cfg_file.write("INIT 0\n") cfg_file.write("INIT 0\n")
cfg_file.write("TRANSITION 0 1 0.5\n") cfg_file.write("TRANSITION 0 1 0.5\n")