ruby: replace global g_abs_controls with per-RubySystem var

This is another step in the process of removing global variables
from Ruby to enable multiple RubySystem instances in a single simulation.

The list of abstract controllers is per-RubySystem and should be
represented that way, rather than as a global.

Since this is the last remaining Ruby global variable, the
src/mem/ruby/Common/Global.* files are also removed.
This commit is contained in:
Brandon Potter 2015-07-10 16:05:24 -05:00
parent f9a370f172
commit bfe7ee96ad
23 changed files with 22 additions and 110 deletions

View file

@ -35,7 +35,6 @@
#include <vector>
#include "mem/ruby/common/DataBlock.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "mem/ruby/system/RubyPort.hh"
#include "mem/mem_object.hh"

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@ -36,7 +36,6 @@
#include "mem/protocol/RubyAccessMode.hh"
#include "mem/protocol/TesterStatus.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
class SubBlock;

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@ -35,7 +35,6 @@
#include "base/hashmap.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
class Check;
class RubyTester;

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@ -43,7 +43,6 @@
#include "cpu/testers/rubytest/Check.hh"
#include "cpu/testers/rubytest/RubyTester.hh"
#include "debug/RubyTest.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "mem/ruby/system/System.hh"
#include "sim/sim_exit.hh"

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@ -47,7 +47,6 @@
#include <vector>
#include "cpu/testers/rubytest/CheckTable.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "mem/ruby/system/RubyPort.hh"
#include "mem/mem_object.hh"

View file

@ -1,33 +0,0 @@
/*
* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "mem/ruby/common/Global.hh"
using namespace std;
vector<map<uint32_t, AbstractController *> > g_abs_controls;

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@ -1,41 +0,0 @@
/*
* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __MEM_RUBY_COMMON_GLOBAL_HH__
#define __MEM_RUBY_COMMON_GLOBAL_HH__
#include <map>
#include <vector>
#include "base/str.hh"
#include "base/types.hh"
class AbstractController;
extern std::vector<std::map<uint32_t, AbstractController *> > g_abs_controls;
#endif // __MEM_RUBY_COMMON_GLOBAL_HH__

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@ -36,7 +36,6 @@ if env['PROTOCOL'] == 'None':
Source('Address.cc')
Source('Consumer.cc')
Source('DataBlock.cc')
Source('Global.cc')
Source('Histogram.cc')
Source('NetDest.cc')
Source('Set.cc')

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@ -32,7 +32,6 @@
#include "base/cast.hh"
#include "base/stl_helpers.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/NetDest.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.hh"

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@ -28,7 +28,6 @@
* Authors: Niket Agarwal
*/
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh"
#include "mem/ruby/system/System.hh"

View file

@ -32,7 +32,6 @@
#include "base/cast.hh"
#include "base/stl_helpers.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/NetDest.hh"
#include "mem/ruby/network/BasicLink.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/GarnetLink.hh"

View file

@ -43,7 +43,6 @@
#include <vector>
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/network/Network.hh"
#include "mem/ruby/system/System.hh"

View file

@ -34,7 +34,6 @@
#include "mem/protocol/RubyAccessMode.hh"
#include "mem/protocol/RubyRequestType.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/Set.hh"
class Histogram;

View file

@ -60,7 +60,8 @@
using namespace std;
using m5::stl_helpers::operator<<;
Profiler::Profiler(const RubySystemParams *p)
Profiler::Profiler(const RubySystemParams *p, RubySystem *rs)
: m_ruby_system(rs)
{
m_hot_lines = p->hot_lines;
m_all_instructions = p->all_instructions;
@ -253,8 +254,8 @@ Profiler::collateStats()
uint32_t numVNets = Network::getNumberOfVirtualNetworks();
for (uint32_t i = 0; i < MachineType_NUM; i++) {
for (map<uint32_t, AbstractController*>::iterator it =
g_abs_controls[i].begin();
it != g_abs_controls[i].end(); ++it) {
m_ruby_system->m_abstract_controls[i].begin();
it != m_ruby_system->m_abstract_controls[i].end(); ++it) {
AbstractController *ctr = (*it).second;
delayHistogram.add(ctr->getDelayHist());
@ -267,8 +268,8 @@ Profiler::collateStats()
for (uint32_t i = 0; i < MachineType_NUM; i++) {
for (map<uint32_t, AbstractController*>::iterator it =
g_abs_controls[i].begin();
it != g_abs_controls[i].end(); ++it) {
m_ruby_system->m_abstract_controls[i].begin();
it != m_ruby_system->m_abstract_controls[i].end(); ++it) {
AbstractController *ctr = (*it).second;
Sequencer *seq = ctr->getSequencer();
@ -280,8 +281,8 @@ Profiler::collateStats()
for (uint32_t i = 0; i < MachineType_NUM; i++) {
for (map<uint32_t, AbstractController*>::iterator it =
g_abs_controls[i].begin();
it != g_abs_controls[i].end(); ++it) {
m_ruby_system->m_abstract_controls[i].begin();
it != m_ruby_system->m_abstract_controls[i].end(); ++it) {
AbstractController *ctr = (*it).second;
Sequencer *seq = ctr->getSequencer();

View file

@ -56,7 +56,6 @@
#include "mem/protocol/PrefetchBit.hh"
#include "mem/protocol/RubyAccessMode.hh"
#include "mem/protocol/RubyRequestType.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/MachineID.hh"
#include "params/RubySystem.hh"
@ -66,9 +65,11 @@ class AddressProfiler;
class Profiler
{
public:
Profiler(const RubySystemParams *params);
Profiler(const RubySystemParams *params, RubySystem *rs);
~Profiler();
RubySystem *m_ruby_system;
void wakeup();
void regStats(const std::string &name);
void collateStats();

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@ -110,7 +110,6 @@
#include "base/random.hh"
#include "debug/RubyMemory.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/profiler/Profiler.hh"
#include "mem/ruby/slicc_interface/Message.hh"
#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"

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@ -37,7 +37,6 @@
#include "mem/abstract_mem.hh"
#include "mem/protocol/MemoryMsg.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/profiler/MemCntrlProfiler.hh"
#include "mem/ruby/structures/MemoryNode.hh"
#include "mem/ruby/system/System.hh"

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@ -26,7 +26,6 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/structures/TimerTable.hh"
#include "mem/ruby/system/System.hh"

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@ -36,7 +36,6 @@
#include "debug/RubyStats.hh"
#include "mem/protocol/PrefetchBit.hh"
#include "mem/protocol/RubyAccessMode.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/profiler/Profiler.hh"
#include "mem/ruby/slicc_interface/RubyRequest.hh"
#include "mem/ruby/system/Sequencer.hh"

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@ -68,12 +68,12 @@ RubySystem::RubySystem(const Params *p)
m_memory_size_bits = p->memory_size_bits;
// Resize to the size of different machine types
g_abs_controls.resize(MachineType_NUM);
m_abstract_controls.resize(MachineType_NUM);
// Collate the statistics before they are printed.
Stats::registerDumpCallback(new RubyStatsCallback(this));
// Create the profiler
m_profiler = new Profiler(p);
m_profiler = new Profiler(p, this);
m_phys_mem = p->phys_mem;
}
@ -89,7 +89,7 @@ RubySystem::registerAbstractController(AbstractController* cntrl)
m_abs_cntrl_vec.push_back(cntrl);
MachineID id = cntrl->getMachineID();
g_abs_controls[id.getType()][id.getNum()] = cntrl;
m_abstract_controls[id.getType()][id.getNum()] = cntrl;
}
RubySystem::~RubySystem()

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@ -45,6 +45,7 @@
#include "sim/clocked_object.hh"
class Network;
class AbstractController;
class RubySystem : public ClockedObject
{
@ -142,6 +143,7 @@ class RubySystem : public ClockedObject
public:
Profiler* m_profiler;
CacheRecorder* m_cache_recorder;
std::vector<std::map<uint32_t, AbstractController *> > m_abstract_controls;
};
class RubyStatsCallback : public Callback

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@ -250,7 +250,6 @@ class $py_ident(RubyController):
#include "mem/protocol/TransitionResult.hh"
#include "mem/protocol/Types.hh"
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
#include "params/$c_ident.hh"
''')
@ -438,7 +437,6 @@ void unset_tbe(${{self.TBEType.c_ident}}*& m_tbe_ptr);
#include "mem/protocol/${ident}_Event.hh"
#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/Types.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/system/System.hh"
''')
for include_path in includes:
@ -771,9 +769,10 @@ $c_ident::collateStats()
for (${ident}_Event event = ${ident}_Event_FIRST;
event < ${ident}_Event_NUM; ++event) {
for (unsigned int i = 0; i < m_num_controllers; ++i) {
RubySystem *rs = params()->ruby_system;
std::map<uint32_t, AbstractController *>::iterator it =
g_abs_controls[MachineType_${ident}].find(i);
assert(it != g_abs_controls[MachineType_${ident}].end());
rs->m_abstract_controls[MachineType_${ident}].find(i);
assert(it != rs->m_abstract_controls[MachineType_${ident}].end());
(*eventVec[event])[i] =
(($c_ident *)(*it).second)->getEventCount(event);
}
@ -786,9 +785,10 @@ $c_ident::collateStats()
event < ${ident}_Event_NUM; ++event) {
for (unsigned int i = 0; i < m_num_controllers; ++i) {
RubySystem *rs = params()->ruby_system;
std::map<uint32_t, AbstractController *>::iterator it =
g_abs_controls[MachineType_${ident}].find(i);
assert(it != g_abs_controls[MachineType_${ident}].end());
rs->m_abstract_controls[MachineType_${ident}].find(i);
assert(it != rs->m_abstract_controls[MachineType_${ident}].end());
(*transVec[state][event])[i] =
(($c_ident *)(*it).second)->getTransitionCount(state, event);
}
@ -1044,7 +1044,6 @@ $c_ident::functionalWriteBuffers(PacketPtr& pkt)
code('''
#include "mem/protocol/Types.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/system/System.hh"
''')
@ -1120,7 +1119,6 @@ ${ident}_Controller::wakeup()
#include "mem/protocol/${ident}_Event.hh"
#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/Types.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/system/System.hh"
#define HASH_FUN(state, event) ((int(state)*${ident}_Event_NUM)+int(event))

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@ -399,7 +399,6 @@ operator<<(std::ostream& out, const ${{self.c_ident}}& obj)
#include <memory>
#include "mem/protocol/${{self.c_ident}}.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/system/System.hh"
using namespace std;