sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Some changes for misc regs which were changed into unofficial integer registers, and moved the flattenIndex function into the register file.

Browse source 
--HG--
extra : convert_revision : 6b797c793a6c12c61a23f0f78a1ea1c88609553e
This commit is contained in:
Gabe Black 2006-12-06 05:46:44 -05:00
parent 5ad1731a12
commit bf5f6c6430
2 changed files with 75 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

80
src/arch/sparc/regfile.cc
View file

@ -151,6 +151,72 @@ void RegFile::setIntReg(int intReg, const IntReg &val)
intRegFile.setReg(intReg, val); intRegFile.setReg(intReg, val);
} }
int SparcISA::flattenIntIndex(ThreadContext * tc, int reg)
{
int gl = tc->readMiscReg(MISCREG_GL);
int cwp = tc->readMiscReg(MISCREG_CWP);
//DPRINTF(Sparc, "Global Level = %d, Current Window Pointer = %d\n", gl, cwp);
int newReg;
if(reg < 8)
{
//Global register
//Put it in the appropriate set of globals
newReg = reg + gl * 8;
}
else if(reg < NumIntArchRegs)
{
//Regular windowed register
//Put it in the window pointed to by cwp
newReg = MaxGL * 8 +
((reg - 8 - cwp * 16 + NWindows * 16) % (NWindows * 16));
}
else if(reg < NumIntArchRegs + NumMicroIntRegs)
{
//Microcode register
//Displace from the end of the regular registers
newReg = reg - NumIntArchRegs + MaxGL * 8 + NWindows * 16;
}
else if(reg < 2 * NumIntArchRegs + NumMicroIntRegs)
{
reg -= (NumIntArchRegs + NumMicroIntRegs);
if(reg < 8)
{
//Global register from the next window
//Put it in the appropriate set of globals
newReg = reg + gl * 8;
}
else
{
//Windowed register from the previous window
//Put it in the window before the one pointed to by cwp
newReg = MaxGL * 8 +
((reg - 8 - (cwp - 1) * 16 + NWindows * 16) % (NWindows * 16));
}
}
else if(reg < 3 * NumIntArchRegs + NumMicroIntRegs)
{
reg -= (2 * NumIntArchRegs + NumMicroIntRegs);
if(reg < 8)
{
//Global register from the previous window
//Put it in the appropriate set of globals
newReg = reg + gl * 8;
}
else
{
//Windowed register from the next window
//Put it in the window after the one pointed to by cwp
newReg = MaxGL * 8 +
((reg - 8 - (cwp + 1) * 16 + NWindows * 16) % (NWindows * 16));
}
}
else
panic("Tried to flatten invalid register index %d!\n", reg);
DPRINTF(Sparc, "Flattened register %d to %d.\n", reg, newReg);
return newReg;
//return intRegFile.flattenIndex(reg);
}
void RegFile::serialize(std::ostream &os) void RegFile::serialize(std::ostream &os)
{ {
intRegFile.serialize(os); intRegFile.serialize(os);
@ -220,8 +286,8 @@ void SparcISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
// ASRs // ASRs
dest->setMiscReg(MISCREG_Y, src->readMiscReg(MISCREG_Y)); // dest->setMiscReg(MISCREG_Y, src->readMiscReg(MISCREG_Y));
dest->setMiscReg(MISCREG_CCR, src->readMiscReg(MISCREG_CCR)); // dest->setMiscReg(MISCREG_CCR, src->readMiscReg(MISCREG_CCR));
dest->setMiscReg(MISCREG_ASI, src->readMiscReg(MISCREG_ASI)); dest->setMiscReg(MISCREG_ASI, src->readMiscReg(MISCREG_ASI));
dest->setMiscReg(MISCREG_TICK, src->readMiscReg(MISCREG_TICK)); dest->setMiscReg(MISCREG_TICK, src->readMiscReg(MISCREG_TICK));
dest->setMiscReg(MISCREG_FPRS, src->readMiscReg(MISCREG_FPRS)); dest->setMiscReg(MISCREG_FPRS, src->readMiscReg(MISCREG_FPRS));
@ -236,11 +302,11 @@ void SparcISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
dest->setMiscReg(MISCREG_PSTATE, src->readMiscReg(MISCREG_PSTATE)); dest->setMiscReg(MISCREG_PSTATE, src->readMiscReg(MISCREG_PSTATE));
dest->setMiscReg(MISCREG_PIL, src->readMiscReg(MISCREG_PIL)); dest->setMiscReg(MISCREG_PIL, src->readMiscReg(MISCREG_PIL));
dest->setMiscReg(MISCREG_CWP, src->readMiscReg(MISCREG_CWP)); dest->setMiscReg(MISCREG_CWP, src->readMiscReg(MISCREG_CWP));
dest->setMiscReg(MISCREG_CANSAVE, src->readMiscReg(MISCREG_CANSAVE)); // dest->setMiscReg(MISCREG_CANSAVE, src->readMiscReg(MISCREG_CANSAVE));
dest->setMiscReg(MISCREG_CANRESTORE, src->readMiscReg(MISCREG_CANRESTORE)); // dest->setMiscReg(MISCREG_CANRESTORE, src->readMiscReg(MISCREG_CANRESTORE));
dest->setMiscReg(MISCREG_OTHERWIN, src->readMiscReg(MISCREG_OTHERWIN)); // dest->setMiscReg(MISCREG_OTHERWIN, src->readMiscReg(MISCREG_OTHERWIN));
dest->setMiscReg(MISCREG_CLEANWIN, src->readMiscReg(MISCREG_CLEANWIN)); // dest->setMiscReg(MISCREG_CLEANWIN, src->readMiscReg(MISCREG_CLEANWIN));
dest->setMiscReg(MISCREG_WSTATE, src->readMiscReg(MISCREG_WSTATE)); // dest->setMiscReg(MISCREG_WSTATE, src->readMiscReg(MISCREG_WSTATE));
dest->setMiscReg(MISCREG_GL, src->readMiscReg(MISCREG_GL)); dest->setMiscReg(MISCREG_GL, src->readMiscReg(MISCREG_GL));
// Hyperprivilged registers // Hyperprivilged registers

2
src/arch/sparc/regfile.hh
View file

@ -120,6 +120,8 @@ namespace SparcISA
void changeContext(RegContextParam param, RegContextVal val); void changeContext(RegContextParam param, RegContextVal val);
}; };
int flattenIntIndex(ThreadContext * tc, int reg);
void copyRegs(ThreadContext *src, ThreadContext *dest); void copyRegs(ThreadContext *src, ThreadContext *dest);
void copyMiscRegs(ThreadContext *src, ThreadContext *dest); void copyMiscRegs(ThreadContext *src, ThreadContext *dest);