sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

mem: Wakeup sleeping CPUs without caches on LLSC

Browse source 
For systems without caches, the LLSC code does not get snoops for
wake-ups. We add the LLSC code in the abstract memory to do the job
for us.
This commit is contained in:
Ali Saidi 2014-03-07 15:56:23 -05:00
parent f4a897d8e3
commit bf39a475fe
2 changed files with 9 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
src/arch/null/cpu_dummy.hh
View file

@ -47,6 +47,7 @@ class BaseCPU
public:
static int numSimulatedInsts() { return 0; }
static int numSimulatedOps() { return 0; }
static void wakeup() { ; }
};
#endif // __ARCH_NULL_CPU_DUMMY_HH__

8
src/mem/abstract_mem.cc
View file

@ -44,6 +44,8 @@
#include "arch/registers.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "debug/LLSC.hh"
#include "debug/MemoryAccess.hh"
#include "mem/abstract_mem.hh"
@ -260,6 +262,12 @@ AbstractMemory::checkLockedAddrList(PacketPtr pkt)
if (i->addr == paddr) {
DPRINTF(LLSC, "Erasing lock record: context %d addr %#x\n",
i->contextId, paddr);
// For ARM, a spinlock would typically include a Wait
// For Event (WFE) to conserve energy. The ARMv8
// architecture specifies that an event is
// automatically generated when clearing the exclusive
// monitor to wake up the processor in WFE.
system()->getThreadContext(i->contextId)->getCpuPtr()->wakeup();
i = lockedAddrList.erase(i);
} else {
i++;