Start implementing groups of instructions which do the same thing on different sets of inputs.
--HG-- extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
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@ -61,14 +61,14 @@
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0x1: decode OPCODE_OP_TOP5 {
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0x1: decode OPCODE_OP_TOP5 {
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format WarnUnimpl {
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format WarnUnimpl {
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0x00: decode OPCODE_OP_BOTTOM3 {
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0x00: decode OPCODE_OP_BOTTOM3 {
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0x0: add_Eb_Gb();
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0x1: add_Ev_Gv();
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0x2: add_Gb_Eb();
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0x3: add_Gv_Ev();
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0x4: add_Al_Ib();
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0x5: add_rAX_Iz();
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0x6: push_ES();
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0x6: push_ES();
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0x7: pop_ES();
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0x7: pop_ES();
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default: MultiOp::add(
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{{out1 = in1 + in2}},
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OPCODE_OP_BOTTOM3,
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[[Eb,Gb],[Ev,Gv],
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[Gb,Eb],[Gv,Ev],
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[Al,Ib],[rAx,Iz]]);
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}
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}
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0x01: decode OPCODE_OP_BOTTOM3 {
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0x01: decode OPCODE_OP_BOTTOM3 {
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0x0: or_Eb_Gb();
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0x0: or_Eb_Gb();
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@ -94,3 +94,7 @@
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//Include a format to signal m5 internal errors. This is used to indicate a
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//Include a format to signal m5 internal errors. This is used to indicate a
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//malfunction of the decode mechanism.
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//malfunction of the decode mechanism.
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##include "error.isa"
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##include "error.isa"
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//Include a format which implements a batch of instructions which do the same
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//thing on a variety of inputs
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##include "multi.isa"
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106
src/arch/x86/isa/formats/multi.isa
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106
src/arch/x86/isa/formats/multi.isa
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@ -0,0 +1,106 @@
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// -*- mode:c++ -*-
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// Copyright (c) 2007 The Hewlett-Packard Development Company
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// All rights reserved.
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//
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// Redistribution and use of this software in source and binary forms,
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// with or without modification, are permitted provided that the
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// following conditions are met:
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//
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// The software must be used only for Non-Commercial Use which means any
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// use which is NOT directed to receiving any direct monetary
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// compensation for, or commercial advantage from such use. Illustrative
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// examples of non-commercial use are academic research, personal study,
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// teaching, education and corporate research & development.
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// Illustrative examples of commercial use are distributing products for
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// commercial advantage and providing services using the software for
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// commercial advantage.
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//
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// If you wish to use this software or functionality therein that may be
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// covered by patents for commercial use, please contact:
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// Director of Intellectual Property Licensing
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// Office of Strategy and Technology
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// Hewlett-Packard Company
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// 1501 Page Mill Road
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// Palo Alto, California 94304
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//
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// Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer. Redistributions
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// in binary form must reproduce the above copyright notice, this list of
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// conditions and the following disclaimer in the documentation and/or
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// other materials provided with the distribution. Neither the name of
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// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission. No right of
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// sublicense is granted herewith. Derivatives of the software and
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// output created using the software may be prepared, but only for
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// Non-Commercial Uses. Derivatives of the software may be shared with
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// others provided: (i) the others agree to abide by the list of
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// conditions herein which includes the Non-Commercial Use restrictions;
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// and (ii) such Derivatives of the software include the above copyright
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// notice to acknowledge the contribution from this software where
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// applicable, this list of conditions and the disclaimer below.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Gabe Black
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////////////////////////////////////////////////////////////////////
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//
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// Instructions that do the same thing to multiple sets of arguments.
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//
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output header {{
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}};
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output decoder {{
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}};
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output exec {{
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}};
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let {{
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multiops = {}
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}};
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def format MultiOp(code, switchVal, opTags, *opt_flags) {{
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# Loads and stores that bring in and write out values from the
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# instructions. These are determined by the input and output tags,
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# and the resulting instruction will have the right number of micro ops,
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# or could be implemented as an atomic macro op.
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instNames = []
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for tagSet in opTags:
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loads = []
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stores = []
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postfix = ''
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for tag in tagSet:
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postfix += '_' + tag
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gather_inputs = ''
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if len(loads) + len(stores) == 0:
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# If there are no loads or stores, make this a single instruction.
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iop = InstObjParams(name, Name + postfix, 'X86StaticInst',
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{"code": code, "gather_inputs": gather_inputs},
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opt_flags)
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else:
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# Build up a macro op. We'll punt on this for now
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pass
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decodeBlob = 'switch(%s) {\n' % switchVal
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counter = 0
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for inst in instNames:
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decodeBlob += '%d: return (X86StaticInst *)(new %s(machInst));\n' % \
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(counter, inst)
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counter += 1
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decodeBlob += '}\n'
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# decode_block = BasicDecodeWithMnemonic.subst(iop)
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}};
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