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ruby: mesi three level: name change to avoid clash

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The accessor function getDestination() for Destination variable in the
coherence message clashes with the getDestination() that is part of the Message
class.  Hence the name change.
This commit is contained in:
Nilay Vaish 2015-07-04 10:43:46 -05:00
parent b4efb48a71
commit baa3eb0de3
3 changed files with 15 additions and 15 deletions
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20
src/mem/protocol/MESI_Three_Level-L0cache.sm
View file

@ -257,7 +257,7 @@ machine(L0Cache, "MESI Directory L0 Cache")
in_port(messgeBuffer_in, CoherenceMsg, bufferFromL1, rank = 1) {
if (messgeBuffer_in.isReady()) {
peek(messgeBuffer_in, CoherenceMsg, block_on="Addr") {
assert(in_msg.Destination == machineID);
assert(in_msg.Dest == machineID);
Entry cache_entry := getCacheEntry(in_msg.Addr);
TBE tbe := TBEs[in_msg.Addr];
@ -368,9 +368,9 @@ machine(L0Cache, "MESI Directory L0 Cache")
out_msg.Addr := address;
out_msg.Class := CoherenceClass:GETS;
out_msg.Sender := machineID;
out_msg.Destination := createMachineID(MachineType:L1Cache, version);
out_msg.Dest := createMachineID(MachineType:L1Cache, version);
DPRINTF(RubySlicc, "address: %s, destination: %s\n",
address, out_msg.Destination);
address, out_msg.Dest);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.AccessMode := in_msg.AccessMode;
}
@ -384,10 +384,10 @@ machine(L0Cache, "MESI Directory L0 Cache")
out_msg.Class := CoherenceClass:GETX;
out_msg.Sender := machineID;
DPRINTF(RubySlicc, "%s\n", machineID);
out_msg.Destination := createMachineID(MachineType:L1Cache, version);
out_msg.Dest := createMachineID(MachineType:L1Cache, version);
DPRINTF(RubySlicc, "address: %s, destination: %s\n",
address, out_msg.Destination);
address, out_msg.Dest);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.AccessMode := in_msg.AccessMode;
}
@ -400,10 +400,10 @@ machine(L0Cache, "MESI Directory L0 Cache")
out_msg.Addr := address;
out_msg.Class := CoherenceClass:UPGRADE;
out_msg.Sender := machineID;
out_msg.Destination := createMachineID(MachineType:L1Cache, version);
out_msg.Dest := createMachineID(MachineType:L1Cache, version);
DPRINTF(RubySlicc, "address: %s, destination: %s\n",
address, out_msg.Destination);
address, out_msg.Dest);
out_msg.MessageSize := MessageSizeType:Control;
out_msg.AccessMode := in_msg.AccessMode;
}
@ -418,7 +418,7 @@ machine(L0Cache, "MESI Directory L0 Cache")
out_msg.DataBlk := cache_entry.DataBlk;
out_msg.Dirty := cache_entry.Dirty;
out_msg.Sender := machineID;
out_msg.Destination := createMachineID(MachineType:L1Cache, version);
out_msg.Dest := createMachineID(MachineType:L1Cache, version);
out_msg.MessageSize := MessageSizeType:Writeback_Data;
}
}
@ -429,7 +429,7 @@ machine(L0Cache, "MESI Directory L0 Cache")
out_msg.Addr := address;
out_msg.Class := CoherenceClass:INV_ACK;
out_msg.Sender := machineID;
out_msg.Destination := createMachineID(MachineType:L1Cache, version);
out_msg.Dest := createMachineID(MachineType:L1Cache, version);
out_msg.MessageSize := MessageSizeType:Response_Control;
}
}
@ -450,7 +450,7 @@ machine(L0Cache, "MESI Directory L0 Cache")
out_msg.DataBlk := cache_entry.DataBlk;
out_msg.Dirty := cache_entry.Dirty;
out_msg.Sender:= machineID;
out_msg.Destination := createMachineID(MachineType:L1Cache, version);
out_msg.Dest := createMachineID(MachineType:L1Cache, version);
if (cache_entry.Dirty) {
out_msg.MessageSize := MessageSizeType:Writeback_Data;

8
src/mem/protocol/MESI_Three_Level-L1cache.sm
View file

@ -551,7 +551,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Addr := address;
out_msg.Class := CoherenceClass:INV;
out_msg.Sender := machineID;
out_msg.Destination := createMachineID(MachineType:L0Cache, version);
out_msg.Dest := createMachineID(MachineType:L0Cache, version);
out_msg.MessageSize := MessageSizeType:Control;
}
}
@ -606,7 +606,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Addr := address;
out_msg.Class := CoherenceClass:DATA;
out_msg.Sender := machineID;
out_msg.Destination := createMachineID(MachineType:L0Cache, version);
out_msg.Dest := createMachineID(MachineType:L0Cache, version);
out_msg.DataBlk := cache_entry.DataBlk;
out_msg.Dirty := cache_entry.Dirty;
out_msg.MessageSize := MessageSizeType:Response_Data;
@ -620,7 +620,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Addr := address;
out_msg.Class := CoherenceClass:STALE_DATA;
out_msg.Sender := machineID;
out_msg.Destination := createMachineID(MachineType:L0Cache, version);
out_msg.Dest := createMachineID(MachineType:L0Cache, version);
out_msg.DataBlk := cache_entry.DataBlk;
out_msg.Dirty := cache_entry.Dirty;
out_msg.MessageSize := MessageSizeType:Response_Data;
@ -634,7 +634,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
out_msg.Addr := address;
out_msg.Class := CoherenceClass:DATA_EXCLUSIVE;
out_msg.Sender := machineID;
out_msg.Destination := createMachineID(MachineType:L0Cache, version);
out_msg.Dest := createMachineID(MachineType:L0Cache, version);
out_msg.DataBlk := cache_entry.DataBlk;
out_msg.Dirty := cache_entry.Dirty;
out_msg.MessageSize := MessageSizeType:Response_Data;

2
src/mem/protocol/MESI_Three_Level-msg.sm
View file

@ -59,7 +59,7 @@ structure(CoherenceMsg, desc="...", interface="Message") {
CoherenceClass Class, desc="Type of message (GetS, GetX, PutX, etc)";
RubyAccessMode AccessMode, desc="user/supervisor access type";
MachineID Sender, desc="What component sent this message";
MachineID Destination, desc="What machine receives this message";
MachineID Dest, desc="What machine receives this message";
MessageSizeType MessageSize, desc="size category of the message";
DataBlock DataBlk, desc="Data for the cache line (if PUTX)";
bool Dirty, default="false", desc="Dirty bit";