Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/linux

into zizzer.eecs.umich.edu:/y/saidi/work/m5

--HG--
extra : convert_revision : 35c2de18adad0957538453b2a083e59de535aa88

dev/baddev.cc

@@ -0,0 +1,68 @@
+/* $Id$ */
+
+/* @file
+ * BadDevice implemenation
+ */
+
+#include <deque>
+#include <string>
+#include <vector>
+
+#include "base/trace.hh"
+#include "cpu/exec_context.hh"
+#include "dev/scsi_ctrl.hh"
+#include "dev/baddev.hh"
+#include "dev/tsunamireg.h"
+#include "dev/tsunami.hh"
+#include "mem/functional_mem/memory_control.hh"
+#include "sim/builder.hh"
+#include "sim/system.hh"
+
+using namespace std;
+
+BadDevice::BadDevice(const string &name,
+                       Addr addr, Addr mask, MemoryController *mmu, const string &devicename)
+    : MmapDevice(name, addr, mask, mmu), devname(devicename)
+{
+}
+
+Fault
+BadDevice::read(MemReqPtr &req, uint8_t *data)
+{
+
+    panic("Device %s not imlpmented\n", devname);
+    return No_Fault;
+}
+
+Fault
+BadDevice::write(MemReqPtr &req, const uint8_t *data)
+{
+    panic("Device %s not imlpmented\n", devname);
+    return No_Fault;
+}
+
+
+BEGIN_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
+
+    SimObjectParam<MemoryController *> mmu;
+    Param<Addr> addr;
+    Param<Addr> mask;
+    Param<string> devicename;
+
+END_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
+
+BEGIN_INIT_SIM_OBJECT_PARAMS(BadDevice)
+
+    INIT_PARAM(mmu, "Memory Controller"),
+    INIT_PARAM(addr, "Device Address"),
+    INIT_PARAM(mask, "Address Mask"),
+    INIT_PARAM(devicename, "Name of device to error on")
+
+END_INIT_SIM_OBJECT_PARAMS(BadDevice)
+
+CREATE_SIM_OBJECT(BadDevice)
+{
+    return new BadDevice(getInstanceName(), addr, mask, mmu, devicename);
+}
+
+REGISTER_SIM_OBJECT("BadDevice", BadDevice)

dev/baddev.hh

@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2003 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* @file
+ * This devices just panics when touched. For example if you have a
+ * kernel that touches the frame buffer which isn't allowed.
+ */
+
+#ifndef __BADDEV_HH__
+#define __BADDEV_HH__
+
+#include "mem/functional_mem/mmap_device.hh"
+
+/**
+ * BadDevice
+ * This device just panics when accessed. It is supposed to warn
+ * the user that the kernel they are running has unsupported
+ * options (i.e. frame buffer)
+ */
+class BadDevice : public MmapDevice
+{
+  private:
+
+      std::string devname;
+  protected:
+
+  public:
+    /**
+      * The default constructor.
+      */
+    BadDevice(const std::string &name, Addr addr, Addr mask,
+              MemoryController *mmu, const std::string &devicename);
+
+    virtual Fault read(MemReqPtr &req, uint8_t *data);
+    virtual Fault write(MemReqPtr &req, const uint8_t *data);
+
+
+};
+
+#endif // __BADDEV_HH__

dev/pcidev.cc

@@ -125,6 +125,7 @@ PciDev::WriteConfig(int offset, int size, uint32_t data)
         switch (offset) {
           case PCI0_INTERRUPT_LINE:
           case PCI_CACHE_LINE_SIZE:
+          case PCI_LATENCY_TIMER:
             *(uint8_t *)&config.data[offset] = byte_value;
             break;
 

dev/tsunami_uart.cc

@@ -36,6 +36,7 @@ TsunamiUart::TsunamiUart(const string &name, SimConsole *c,
     : MmapDevice(name, addr, mask, mmu),
       cons(c), status_store(0), valid_char(false)
 {
+    IER = 0;
 }
 
 Fault
@@ -95,8 +96,8 @@ TsunamiUart::read(MemReqPtr &req, uint8_t *data)
         }
 
       case 0x8: // Data register (RX)
-        if (!valid_char)
-            panic("Invalid character");
+//	if (!valid_char)
+//	    panic("Invalid character");
 
         DPRINTF(TsunamiUart, "read data register \'%c\' %#02x\n",
                 isprint(next_char) ? next_char : ' ', next_char);
@@ -106,7 +107,18 @@ TsunamiUart::read(MemReqPtr &req, uint8_t *data)
         return No_Fault;
 
       case 0x9: // Interrupt Enable Register
-        *data = 0;
+        // This is the lovely way linux checks there is actually a serial
+        // port at the desired address
+        if (IER == 0)
+            *data = 0;
+        else if (IER == 0x0F)
+            *data = 0x0F;
+        else
+            *data = 0;
+        return No_Fault;
+      case 0xA:
+        //*data = 2<<6; // This means a 8250 serial port, do we want a 16550?
+        *data = 0; // This means a 8250 serial port, do we want a 16550?
         return No_Fault;
     }
     *data = 0;
@@ -145,7 +157,7 @@ TsunamiUart::write(MemReqPtr &req, const uint8_t *data)
 
           default:
             DPRINTF(TsunamiUart, "writing status register %#x \n",
-                    *(uint64_t *)data);
+                    *(uint8_t *)data);
             return No_Fault;
         }
 
@@ -154,6 +166,7 @@ TsunamiUart::write(MemReqPtr &req, const uint8_t *data)
         return No_Fault;
       case 0x9: // DLM
         DPRINTF(TsunamiUart, "writing to DLM/IER %#x\n", *(uint8_t*)data);
+        IER = *(uint8_t*)data;
         return No_Fault;
       case 0xc: // MCR
         DPRINTF(TsunamiUart, "writing to MCR %#x\n", *(uint8_t*)data);

dev/tsunami_uart.hh

@@ -47,6 +47,7 @@ class TsunamiUart : public MmapDevice
     int status_store;
     uint8_t next_char;
     bool valid_char;
+    uint8_t IER;
 
   public:
     TsunamiUart(const std::string &name, SimConsole *c,