From b8889a96b38993784ef066c8abcd97a1cf1c128c Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Fri, 6 May 2011 01:00:32 -0700
Subject: [PATCH] X86: Fix the Lldt instructions so they load the ldtr and not
 the tr.

---
 src/arch/x86/isa/insts/system/segmentation.py | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/arch/x86/isa/insts/system/segmentation.py b/src/arch/x86/isa/insts/system/segmentation.py
index 5ecb2e193..53b6908ed 100644
--- a/src/arch/x86/isa/insts/system/segmentation.py
+++ b/src/arch/x86/isa/insts/system/segmentation.py
@@ -223,8 +223,8 @@ def macroop LLDT_R
     ld t2, tsg, [8, t4, t0], 8, dataSize=8
     chks reg, t1, LDTCheck
     wrdh t3, t1, t2
-    wrdl tr, t1, reg
-    wrbase tr, t3, dataSize=8
+    wrdl tsl, t1, reg
+    wrbase tsl, t3, dataSize=8
 end:
     fault "NoFault"
 };
@@ -241,8 +241,8 @@ def macroop LLDT_M
     ld t2, tsg, [8, t4, t0], 8, dataSize=8
     chks t5, t1, LDTCheck
     wrdh t3, t1, t2
-    wrdl tr, t1, t5
-    wrbase tr, t3, dataSize=8
+    wrdl tsl, t1, t5
+    wrbase tsl, t3, dataSize=8
 end:
     fault "NoFault"
 };
@@ -260,8 +260,8 @@ def macroop LLDT_P
     ld t2, tsg, [8, t4, t0], 8, dataSize=8
     chks t5, t1, LDTCheck
     wrdh t3, t1, t2
-    wrdl tr, t1, t5
-    wrbase tr, t3, dataSize=8
+    wrdl tsl, t1, t5
+    wrbase tsl, t3, dataSize=8
 end:
     fault "NoFault"
 };